Etching the large area of sacrificial layer under the microstructure to be released is a common method used in microelectromechanical systems technology. In order to completely release the microstructures, many etching holes are often required on the microstructure to enable the etchant to completely etch the sacrificial layer. However, the etching holes often alter the electromechanical properties of the micro devices, especially capacitive devices, because the fringe fields induced by the etching holes can significantly alter the electrical properties. This article is aimed at evaluating the fringe field capacitance caused by etching holes on microstructures. The authors aim to find a general capacitance compensation formula for the fringe capacitance of etching holes by the use of ANSYS simulation. According to the simulation results, the design of a capacitive structure with small etching holes is recommended to prevent an extreme capacitance decrease. In conclusion, this article provides a fringing field capacitance estimation method that shows the capacitance compensation tendency of the design of etching holes; this method is expected to be applicable to the design in capacitive devices of complementary metal oxide semiconductor–microelectromechanical systems technology.
Wide Spectral Characteristics of Si Photonic Crystal Mach-Zehnder Modulator Fabricated by Complementary Metal-Oxide-Semiconductor Process
