A 40mhz 70db gain variable gain amplifier design using the gm/id design method

Author(s):  
Fernando Paixão Cortes ◽  
Sergio Bampi
2009 ◽  
Vol 4 (1) ◽  
pp. 7-12
Author(s):  
Fernando Paixão Cortes ◽  
Sergio Bampi

This paper addresses the design and post-fabrication measurements of a 40 MHz CMOS Variable Gain Amplifier (VGA) with a 0 to 70 dB gain control range, using the gm/ID design methodology. The VGA architecture is based on a differential pair stage with an automatic continuous-time offset cancellation circuitry, providing an input offset voltage tolerance up to 50 mV. The 3-stage VGA was designed and fabricated through MOSIS service in an IBM 0.18 μm CMOS process. The VGA dissipates 2.6 mA from a 1.8 V supply, with 34,840 μm2 circuit area, excluding bond-pads.


2013 ◽  
Vol 321-324 ◽  
pp. 331-335
Author(s):  
Shan Wen Hu ◽  
Tao Chen ◽  
Huai Gao ◽  
Long Xing Shi ◽  
G.P. Li

A traveling wave matching (TWM) network is proposed for broadband variable gain amplifier design. The TWM network lessens input return loss and noise figure dependence on VGA’s gain, which is adjusted by biasing of the gain control circuit. A wide band (DC to 12 GHz) VGA with the novel TWM network as input matching is implemented in 2μm InGaP/GaAs HBT (fT of 29.5GHz) technology with die size of 1×2 mm2. As gain control voltage sweeps, the VGA shows a gain tuned from -15 dB to 15 dB and an average noise figure ranging from 8dB to 6.5dB, while S11 (lower than -20dB) and S22 (lower than -10dB) almost unchanged over the operation frequency band.


2017 ◽  
Vol 10 (4) ◽  
pp. 151-158 ◽  
Author(s):  
Sawssen Lahiani ◽  
Samir Ben Salem ◽  
Houda Daoud ◽  
Mourad Loulou

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