scholarly journals High performance filter and variable gain amplifier design for biosignal measurement devices

2015 ◽  
Author(s):  
Kainan Wang
Keyword(s):  
High Performance ◽  
Variable Gain Amplifier ◽  
Variable Gain ◽  
Measurement Devices ◽  
Amplifier Design

A high-performance Ka-band monolithic variable-gain amplifier using dual-gate HEMTs

1997 ◽  
Vol 7 (8) ◽  
pp. 251-252 ◽  
Author(s):  
T. Kashiwa ◽  
T. Katoh ◽  
T. Ishida ◽  
Y. Kojima ◽  
Y. Mitsui
Keyword(s):  
High Performance ◽  
Variable Gain Amplifier ◽  
Ka Band ◽  
Variable Gain ◽  
Dual Gate

An Advanced Traveling Wave Matching Network for DC-12GHz Variable Gain Amplifier Design

2013 ◽  
Vol 321-324 ◽  
pp. 331-335
Author(s):  
Shan Wen Hu ◽  
Tao Chen ◽  
Huai Gao ◽  
Long Xing Shi ◽  
G.P. Li
Keyword(s):  
Traveling Wave ◽  
Noise Figure ◽  
Gain Control ◽  
Wide Band ◽  
Variable Gain Amplifier ◽  
Control Voltage ◽  
Variable Gain ◽  
Input Matching ◽  
Amplifier Design ◽  
Wave Matching

A traveling wave matching (TWM) network is proposed for broadband variable gain amplifier design. The TWM network lessens input return loss and noise figure dependence on VGA’s gain, which is adjusted by biasing of the gain control circuit. A wide band (DC to 12 GHz) VGA with the novel TWM network as input matching is implemented in 2μm InGaP/GaAs HBT (fT of 29.5GHz) technology with die size of 1×2 mm2. As gain control voltage sweeps, the VGA shows a gain tuned from -15 dB to 15 dB and an average noise figure ranging from 8dB to 6.5dB, while S11 (lower than -20dB) and S22 (lower than -10dB) almost unchanged over the operation frequency band.

scholarly journals Design of a Sampler circuit for Flash ADC using 45nm Technology

2019 ◽  
Vol 9 (2) ◽  
pp. 5363-5367
Keyword(s):  
Low Power ◽  
High Performance ◽  
Input Voltage ◽  
Sampling Frequency ◽  
Variable Gain Amplifier ◽  
Effective Number ◽  
Worst Case ◽  
Flash Adc ◽  
Variable Gain

This paper presents design of a sampler circuit for folding flash ADC. There is a desire for Low power high performance ADC for communication. For low power the size of the ADC should be minimized and for the fast performance flash can be used. Hence to reduce the number of transistors in flash ADC folding network is proposed here. Sampling is the important technique used in the ADC part. In this discussion the sampler circuit includes a differential track and hold switch followed by a variable gain amplifier with a gain of 1 db, a buffer and a folding network. An input voltage of1 V and the sampling frequency of 1GS/s is applied to the sampler circuit. Effective number of bits of more than 5.7 bits is achieved also THD is below -35db in VGA. Buffer achieves a ENOB of 10bits with THD less than -65db. This sampler circuit is designed with the technology of 45nm for coherent sampling. Worst case SNDR is calculated.

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