Write-aware memory management for hybrid SLC-MLC PCM memory systems

2017 ◽  
Vol 17 (2) ◽  
pp. 16-26 ◽  
Author(s):  
Chien-Chung Ho ◽  
Yu-Ming Chang ◽  
Yuan-Hao Chang ◽  
Hsiu-Chang Chen ◽  
Tei-Wei Kuo
Keyword(s):  
Memory Management ◽  
Memory Systems

scholarly journals L2 cache performance analysis for MPSoC by tag – comparision

2017 ◽  
Vol 7 (1.5) ◽  
pp. 285
Author(s):  
Jenitha A ◽  
Elumalai R
Keyword(s):  
Performance Analysis ◽  
Shared Memory ◽  
Memory Management ◽  
Memory Systems ◽  
Critical Problem ◽  
Energy Current ◽  
L2 Cache ◽  
Application Processor ◽  
Cache Miss ◽  
Embedded Applications

Memory systems in many applications are becoming increasingly large, contributing to many challenges in the memory management that has led to many method to manage memory. The tag comparison consumes large amount of cache energy. Current methods provide tag comparison cache or failure of the expected cache. Here is proposed an idea based on new call Comparing Tag stages, filter bloom is presented to improve the efficiency of the cache to predict failure and partial tag comparison for the cold line of verification and full comparison check for direct labels. Moreover, the administration of the cache that is filled with cache lines occurs when there is a cache miss. Today's embedded applications use MPSoC. The  MPSoC consists of the following ie more than one  processors, shared memory among the processors available and a global  off-chip memory. Planning of the activities of an integrated application processor and memory partition between processors are two main critical problem. Here, for an integrated application, both task scheduling and partitioning the integrated available L2 cache to reduce the runtime approach is used.

Using DRAM as Cache for Non-Volatile Main Memory Swapping

2016 ◽  
Vol 4 (1) ◽  
pp. 61-71
Author(s):  
Hirotaka Kawata ◽  
Gaku Nakagawa ◽  
Shuichi Oikawa
Keyword(s):  
Power Consumption ◽  
Power Management ◽  
Mobile Devices ◽  
Memory Management ◽  
High Performance ◽  
Reducing Power ◽  
Memory Systems ◽  
Main Memory ◽  
Dynamic Power Management ◽  
Memory Space

The performance of mobile devices such as smartphones and tablets has been rapidly improving in recent years. However, these improvements have been seriously affecting power consumption. One of the greatest challenges is to achieve efficient power management for battery-equipped mobile devices. To solve this problem, the authors focus on the emerging non-volatile memory (NVM), which has been receiving increasing attention in recent years. Since its performance is comparable with that of DRAM, it is possible to replace the main memory with NVM, thereby reducing power consumption. However, the price and capacity of NVM are problematic. Therefore, the authors provide a large memory space without performance degradation by combining NVM with other memory devices. In this study, they propose a design for non-volatile main memory systems that use DRAM as a swap space. This enables both high performance and energy efficient memory management through dynamic power management in NVM and DRAM.

Working Set Analytics

2021 ◽  
Vol 53 (6) ◽  
pp. 1-36
Author(s):  
Peter J. Denning
Keyword(s):  
Memory Management ◽  
Linear Time ◽  
Memory Systems ◽  
Superior Performance ◽  
System Throughput ◽  
Program Behavior ◽  
Virtual Memory Management ◽  
Working Set ◽  
Linear Time Algorithms ◽  
The Ideal

The working set model for program behavior was invented in 1965. It has stood the test of time in virtual memory management for over 50 years. It is considered the ideal for managing memory in operating systems and caches. Its superior performance was based on the principle of locality, which was discovered at the same time; locality is the observed tendency of programs to use distinct subsets of their pages over extended periods of time. This tutorial traces the development of working set theory from its origins to the present day. We will discuss the principle of locality and its experimental verification. We will show why working set memory management resists thrashing and generates near-optimal system throughput. We will present the powerful, linear-time algorithms for computing working set statistics and applying them to the design of memory systems. We will debunk several myths about locality and the performance of memory systems. We will conclude with a discussion of the application of the working set model in parallel systems, modern shared CPU caches, network edge caches, and inventory and logistics management.

scholarly journals Hardware Memory Management for Future Mobile Hybrid Memory Systems

2020 ◽  
Vol 39 (11) ◽  
pp. 3627-3637
Author(s):  
Fei Wen ◽  
Mian Qin ◽  
Paul V. Gratz ◽  
A. L. Narasimha Reddy
Keyword(s):  
Memory Management ◽  
Memory Systems ◽  
Hybrid Memory

Hierarchical Hybrid Memory Management in OS for Tiered Memory Systems

2019 ◽  
Vol 30 (10) ◽  
pp. 2223-2236 ◽  
Author(s):  
Lei Liu ◽  
Shengjie Yang ◽  
Lu Peng ◽  
Xinyu Li
Keyword(s):  
Memory Management ◽  
Memory Systems ◽  
Hybrid Memory

Memory management techniques for large-scale persistent-main-memory systems

2017 ◽  
Vol 10 (11) ◽  
pp. 1166-1177 ◽  
Author(s):  
Ismail Oukid ◽  
Daniel Booss ◽  
Adrien Lespinasse ◽  
Wolfgang Lehner ◽  
Thomas Willhalm ◽  
...  
Keyword(s):  
Memory Management ◽  
Large Scale ◽  
Memory Systems ◽  
Main Memory ◽  
Management Techniques

scholarly journals Efficient Memory Management for NVM-Based Hybrid Memory Systems

2016 ◽  
Vol 9 (1) ◽  
pp. 445-458 ◽  
Author(s):  
Zhangling Wu ◽  
Peiquan Jin ◽  
Chengcheng Yang ◽  
Lihua Yue
Keyword(s):  
Memory Management ◽  
Memory Systems ◽  
Hybrid Memory ◽  
Efficient Memory

EXPLOITING TEMPORAL LOCALITY FOR ENERGY EFFICIENT MEMORY MANAGEMENT

2008 ◽  
Vol 17 (05) ◽  
pp. 929-941 ◽  
Author(s):  
EUISEONG SEO ◽  
SEUNGRYOUL MAENG ◽  
DONGHYOUK LIM ◽  
JOONWON LEE
Keyword(s):  
Energy Efficient ◽  
Memory Management ◽  
Memory Systems ◽  
Major Power ◽  
Additional Energy ◽  
State Management ◽  
Research Activities ◽  
Management Scheme ◽  
Temporal Locality ◽  
Efficient Memory

Memory is becoming one of the major power consumers in computing systems. Therefore, energy efficient memory management is essential. Modern memory systems employ sleep states for energy saving. To utilize this feature, existing research activities have concentrated on increasing spatial locality to deactivate as many blocks as possible. However, they did not count the unexpected activation of memory blocks due to cache eviction of deactivated tasks. In this paper, we suggest a software-based power state management scheme for memory, which exploits temporal locality to relieve the energy loss from the unexpected activation of memory blocks from cache eviction. The suggested scheme SW-NAP makes a memory block remain deactivated during a certain tick, which has no cache miss over the block. The evaluation shows that SW-NAP is 50% better than PAVM, which is an existing software scheme, and worse than PMU, which is another approach based on the specialized hardware by 20%. We also suggest task scheduling policies that increase the effectiveness of SW-NAP and they saved up to 7% additional energy.

Language processing is not a race against time

2016 ◽  
Vol 39 ◽  
Author(s):  
Giosuè Baggio ◽  
Carmelo M. Vicario
Keyword(s):  
Information Processing ◽  
Human Brain ◽  
Language Processing ◽  
Cognitive Functions ◽  
Memory Systems ◽  
Language System ◽  
Moderating Factors

AbstractWe agree with Christiansen & Chater (C&C) that language processing and acquisition are tightly constrained by the limits of sensory and memory systems. However, the human brain supports a range of cognitive functions that mitigate the effects of information processing bottlenecks. The language system is partly organised around these moderating factors, not just around restrictions on storage and computation.

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