Hardware Context Switch-based Cryptographic Accelerator for Handling Multiple Streams

2021 ◽  
Vol 14 (3) ◽  
pp. 1-25
Author(s):  
Arif Sasongko ◽  
I. M. Narendra Kumara ◽  
Arief Wicaksana ◽  
Frédéric Rousseau ◽  
Olivier Muller
Keyword(s):  
Computation Time ◽  
Multiple Streams ◽  
Original Algorithm ◽  
Context Switching ◽  
Mode Of Operation ◽  
Synthesis Tool ◽  
Block Level ◽  
Key Block ◽  
Symmetric Key ◽  
High Level

The confidentiality and integrity of a stream has become one of the biggest issues in telecommunication. The best available algorithm handling the confidentiality of a data stream is the symmetric key block cipher combined with a chaining mode of operation such as cipher block chaining (CBC) or counter mode (CTR). This scheme is difficult to accelerate using hardware when multiple streams coexist. This is caused by the computation time requirement and mainly by management of the streams. In most accelerators, computation is treated at the block-level rather than as a stream, making the management of multiple streams complex. This article presents a solution combining CBC and CTR modes of operation with a hardware context switching. The hardware context switching allows the accelerator to treat the data as a stream. Each stream can have different parameters: key, initialization value, state of counter. Stream switching was managed by the hardware context switching mechanism. A high-level synthesis tool was used to generate the context switching circuit. The scheme was tested on three cryptographic algorithms: AES, DES, and BC3. The hardware context switching allowed the software to manage multiple streams easily, efficiently, and rapidly. The software was freed of the task of managing the stream state. Compared to the original algorithm, about 18%–38% additional logic elements were required to implement the CBC or CTR mode and the additional circuits to support context switching. Using this method, the performance overhead when treating multiple streams was low, and the performance was comparable to that of existing hardware accelerators not supporting multiple streams.

scholarly journals Implementation of Different Cyptographic Strategies in Cloud Environment

2020 ◽  
Vol 8 (5) ◽  
pp. 4214-4218
Keyword(s):  
Data Privacy ◽  
Research Work ◽  
Computation Time ◽  
Research Paper ◽  
Symmetric Key ◽  
High Level ◽  
Symmetric Key Cryptography ◽  
Cryptographic Techniques ◽  
And Storage ◽  
Public Environment

Cloud computing is hosted technology used to deliver services over internet. These services are broadly classified based on type of hosting i.e. infrastructure, platform and software. Public environment and internet connectivity make it vulnerable and unsafe for communication and storage. Confidentiality is one of the major principles to keep data privacy and protection at high level. Cryptographic techniques are used to achieve confidentiality and integrity of information during unsafe communication. This research paper observes that various cryptographic algorithms known as symmetric key cryptography and asymmetric key cryptography can be used to protect information and make it unreadable for unauthorised users. This research paper implements different security algorithms and observe their performance based on computation time over different input sizes. The complete research work concludes a comparative study and recommends different security approaches for different situations.

Distributed learning with indefinite kernels

2019 ◽  
Vol 17 (06) ◽  
pp. 947-975 ◽  
Author(s):  
Lei Shi
Keyword(s):  
Large Scale ◽  
Substantial Reduction ◽  
Computation Time ◽  
Distributed Learning ◽  
Rates Of Convergence ◽  
Regression Problem ◽  
Data Set ◽  
Regularization Scheme ◽  
Original Algorithm ◽  
Indefinite Kernel

We investigate the distributed learning with coefficient-based regularization scheme under the framework of kernel regression methods. Compared with the classical kernel ridge regression (KRR), the algorithm under consideration does not require the kernel function to be positive semi-definite and hence provides a simple paradigm for designing indefinite kernel methods. The distributed learning approach partitions a massive data set into several disjoint data subsets, and then produces a global estimator by taking an average of the local estimator on each data subset. Easy exercisable partitions and performing algorithm on each subset in parallel lead to a substantial reduction in computation time versus the standard approach of performing the original algorithm on the entire samples. We establish the first mini-max optimal rates of convergence for distributed coefficient-based regularization scheme with indefinite kernels. We thus demonstrate that compared with distributed KRR, the concerned algorithm is more flexible and effective in regression problem for large-scale data sets.

A Framework for Validation of Synthesized MicroElectrode Dot Array Actuations for Digital Microfluidic Biochips

2021 ◽  
Vol 26 (6) ◽  
pp. 1-36
Author(s):  
Pushpita Roy ◽  
Ansuman Banerjee
Keyword(s):  
Formal Analysis ◽  
Digital Microfluidics ◽  
Analysis Method ◽  
Correctness Proofs ◽  
Synthesis Tool ◽  
Laboratory Procedures ◽  
Automated Tools ◽  
Digital Microfluidic ◽  
High Level ◽  
Smooth Transformation

Digital Microfluidics is an emerging technology for automating laboratory procedures in biochemistry. With more and more complex biochemical protocols getting mapped to biochip devices and microfluidics receiving a wide adoption, it is becoming indispensable to develop automated tools and synthesis platforms that can enable a smooth transformation from complex cumbersome benchtop laboratory procedures to biochip execution. Given an informal/semi-formal assay description and a target microfluidic grid architecture on which the assay has to be implemented, a synthesis tool typically translates the high-level assay operations to low-level actuation sequences that can drive the assay realization on the grid. With more and more complex biochemical assay protocols being taken up for synthesis and biochips supporting a wider variety of operations (e.g., MicroElectrode Dot Arrays (MEDAs)), the task of assay synthesis is getting intricately complex. Errors in the synthesized assay descriptions may have undesirable consequences in assay operations, leading to unacceptable outcomes after execution on the biochips. In this work, we focus on the challenge of examining the correctness of synthesized protocol descriptions, before they are taken up for realization on a microfluidic biochip. In particular, we take up a protocol description synthesized for a MEDA biochip and adopt a formal analysis method to derive correctness proofs or a violation thereof, pointing to the exact operation in the erroneous translation. We present experimental results on a few bioassay protocols and show the utility of our framework for verifiable protocol synthesis.

scholarly journals Color Image Encryption using AES and RSA

2020 ◽  
Vol 9 (5) ◽  
pp. 547-550
Keyword(s):  
Data Security ◽  
Block Cipher ◽  
Color Image ◽  
Signal To Noise Ratio ◽  
Security Level ◽  
Change Rate ◽  
The Public ◽  
Key Block ◽  
Symmetric Key ◽  
Encryption Algorithms

Information security is an important task on multimedia and communication world. During storing and sharing maintaining a strategic distance from the outsider access of information is the difficult one. There are many encryption algorithms that can provide data security. In this paper two of the encryption algorithms namely AES and RSA are implemented for color images. AES (Advanced Encryption Standard) is a symmetric key block cipher published in December 2001 by NSIT (National Institute of Standards and Technology). RSA (Rivest-Shamir-Adleman) is an asymmetric key block cipher. It uses two separate keys, one for encryption called the public key and other for decryption called the private key. Both the implementation and analysis are done in Matlab. The quality and security level of both the algorithms is analysed based on various criteria such as Histogram analysis, Correlation analysis, Entropy analysis, NPCR (Number of Pixel Change Rate), UACI (Unified Average Changing Intensity), PSNR (Peak Signal-to-Noise Ratio).

Economic Cycles in Argentina: 1875–1990

2006 ◽  
Vol 38 (3) ◽  
pp. 549-570 ◽  
Author(s):  
ISABEL SANZ-VILLARROYA
Keyword(s):  
Aggregate Demand ◽  
Unit Root Tests ◽  
Economic Cycles ◽  
Long Run ◽  
Economic Forces ◽  
Mode Of Operation ◽  
Key Factor ◽  
Short Run ◽  
High Level ◽  
Level Of Agreement

This article analyses the short-run periods that can be derived from the GDP per capita series for Argentina between 1875 and 1990, after extracting its segmented long-run trend using time series techniques and unit root tests. It also studies the economic forces which, from the aggregate demand side, might provide an explanation for this behaviour. This mode of operation makes it possible to identify successive cycles more accurately than in previous studies. A high level of agreement is observed between the results of this study and arguments in the literature regarding the causes shaping these short-run periods: the analysis demonstrates that exports were the key factor until 1932 while after this year consumption and investment came to predominate.

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