Stress Engineering of Dielectric Films on Semiconductor Substrates

2021 ◽  
Vol MA2021-01 (21) ◽  
pp. 857-857
Author(s):  
Brahim Ahammou ◽  
Aysegul Abdelal ◽  
Solène Gérard ◽  
Christophe Levallois ◽  
Peter Mascher ◽  
...  
Keyword(s):  
Dielectric Films ◽  
Semiconductor Substrates ◽  
Stress Engineering

CHARACTERIZATION OF DIELECTRIC FILMS ON SEMICONDUCTOR SUBSTRATES BY LEAKY-MODES MEASUREMENT

1983 ◽  
Vol 44 (C10) ◽  
pp. C10-131-C10-134
Author(s):  
J.-P. Gruson ◽  
P.-J. Goirand ◽  
F. Cochet ◽  
O. Parriaux
Keyword(s):  
Dielectric Films ◽  
Leaky Modes ◽  
Semiconductor Substrates

Electron microscopy studies of PZT ferroelectric film capacitor structures

1992 ◽  
Vol 50 (2) ◽  
pp. 1364-1365
Author(s):  
V. Kaushik ◽  
P. Maniar ◽  
J. Olowolafe ◽  
R. Jones ◽  
A. Campbell ◽  
...  
Keyword(s):  
Electric Fields ◽  
Sol Gel ◽  
Ferroelectric Material ◽  
Dielectric Constants ◽  
Dielectric Films ◽  
Lead Zirconium Titanate ◽  
Si Substrate ◽  
Film Capacitor ◽  
Pzt Films ◽  
High Dielectric

Lead zirconium titanate films (Pb (Zr,Ti) O3 or PZT) are being considered for potential application as dielectric films in memory technology due to their high dielectric constants. PZT is a ferroelectric material which shows spontaneous polarizability, reversible under applied electric fields. We report herein some results of TEM studies on thin film capacitor structures containing PZT films with platinum-titanium electrodes.The wafers had a stacked structure consisting of PZT/Pt/Ti/SiO2/Si substrate as shown in Figure 1. Platinum acts as electrode material and titanium is used to overcome the problem of platinum adhesion to the oxide layer. The PZT (0/20/80) films were deposited using a sol-gel method and the structure was annealed at 650°C and 800°C for 30 min in an oxygen ambient. XTEM imaging was done at 200KV with the electron beam parallel to <110> zone axis of silicon.Figure 2 shows the PZT and Pt layers only, since the structure had a tendency to peel off at the Ti-Pt interface during TEM sample preparation.

Spectrum of Defect States in Porous Organic Low-k Dielectric Films, Annealed in Argon and Nitrogen

2003 ◽  
Vol 766 ◽  
Author(s):  
V. Ligatchev ◽  
T.K.S. Wong ◽  
T.K. Goh ◽  
Rusli Suzhu Yu
Keyword(s):  
Deep Level ◽  
Dielectric Films ◽  
Silicon Substrates ◽  
Reverse Bias Voltage ◽  
Defect States ◽  
Single Side ◽  
Sandwich Type ◽  
Transient Spectroscopy ◽  
P Type ◽  
Spectrum Deconvolution

AbstractDefect spectrum N(E) of porous organic dielectric (POD) films is studied with capacitance deep-level-transient-spectroscopy (C-DLTS) in the energy range up to 0.7 eV below conduction band bottom Ec. The POD films were prepared by spin coating onto 200mm p-type (1 – 10 Δcm) single-side polished silicon substrates followed by baking at 325°C on a hot plate and curing at 425°C in furnace. The film thickness is in the 5000 – 6000 Å range. The ‘sandwich’ -type NiCr/POD/p-Si/NiCr test structures showed both rectifying DC current-voltage characteristics and linear 1/C2 vs. DC reverse bias voltage. These confirm the applicability of the C-DLTS technique for defect spectrum deconvolution and the n-type conductivity of the studied films. Isochronal annealing (30 min in argon or 60 min in nitrogen) has been performed over the temperature range 300°C - 650°C. The N(E) distribution is only slightly affected by annealing in argon. However, the distribution depends strongly on the annealing temperature in nitrogen ambient. A strong N(E) peak at Ec – E = 0.55 – 0.60 eV is detected in all samples annealed in argon but this peak is practically absent in samples annealed in nitrogen at Ta < 480°C. On the other hand, two new peaks at Ec – E = 0.12 and 0.20 eV appear in the N(E) spectrum of the samples annealed in nitrogen at Ta = 650°C. The different features of the defect spectrum are attributed to different interactions of argon and nitrogen with dangling carbon bonds on the intra-pore surfaces.

Precision Xe Plasma FIB Delayering for Physical Failure Analysis of Sub-20 nm Microprocessor Devices

2017 ◽  
Author(s):  
D. Zudhistira ◽  
V. Viswanathan ◽  
V. Narang ◽  
J.M. Chin ◽  
S. Sharang ◽  
...  
Keyword(s):  
Failure Analysis ◽  
Dielectric Films ◽  
Planar Surface ◽  
Chemical Methods ◽  
Root Cause ◽  
Essential Step ◽  
Dielectric Layers ◽  
Wet Chemical ◽  
20 Nm ◽  
Low K

Abstract Deprocessing is an essential step in the physical failure analysis of ICs. Typically, this is accomplished by techniques such as wet chemical methods, RIE, and mechanical manual polishing. Manual polishing suffers from highly non-uniform delayering particularly for sub 20nm technologies due to aggressive back-end-of-line scaling and porous ultra low-k dielectric films. Recently gas assisted Xe plasma FIB has demonstrated uniform delayering of the metal and dielectric layers, achieving a planar surface of heterogeneous materials. In this paper, the successful application of this technique to delayer sub-20 nm microprocessor chips with real defects to root cause the failure is presented.

Finite-Element Modeling and Quantitative Measurement Using Scanning Microwave Microscopy to Characterize Dielectric Films

2018 ◽  
Author(s):  
K. A. Rubin ◽  
W. Jolley ◽  
Y. Yang
Keyword(s):  
Thin Films ◽  
Dielectric Film ◽  
Dielectric Constants ◽  
Dielectric Films ◽  
Silicon Substrates ◽  
Fem Modeling ◽  
Dielectric Thin Films ◽  
Microwave Microscopy ◽  
Scanning Microwave Microscopy ◽  
Low K

Abstract Scanning Microwave Impedance Microscopy (sMIM) can be used to characterize dielectric thin films and to quantitatively discern film thickness differences. FEM modeling of the sMIM response provides understanding of how to connect the measured sMIM signals to the underlying properties of the dielectric film and its substrate. Modeling shows that sMIM can be used to characterize a range of dielectric film thicknesses spanning both low-k and medium-k dielectric constants. A model system consisting of SiO2 thin films of various thickness on silicon substrates is used to illustrate the technique experimentally.

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