scholarly journals Electrical Modelling of Multilevel On-Chip Interconnections for High-Speed Integrated Circuits

1992 ◽  
Vol 14 (4) ◽  
pp. 199-218 ◽  
Author(s):  
K. Z. Dimopoulos ◽  
J. N. Avaritsiotis ◽  
S. J. White
Keyword(s):  
Integrated Circuits ◽  
Transmission Lines ◽  
High Speed ◽  
Pulse Propagation ◽  
Unit Length ◽  
Coupled Line ◽  
Lossy Transmission ◽  
Electrical Modelling ◽  
High Bit Rates ◽  
On Chip

A method for the electrical parameters analysis and modelling of lossy-coupled multilayer on-chip interconnection lines at high bit rates is presented in detail. It can be used by the VLSI designer to analyze on-chip interconnections with linear, as well as nonlinear/time varying terminators and to simulate the pulse propagation characteristics in high-speed integrated circuits. First the capacitance, inductance, conductance and resistance matrices per unit length for the given multiconductor geometry is computed. A multiple coupled line model consisting of uncoupled lossy transmission lines and linear dependent current and voltage sources if finally calculated according to the capacitance, inductance, conductance and resistance matrix values computed.

Bipolar device technology challenge and opportunity

1985 ◽  
Vol 63 (6) ◽  
pp. 683-692 ◽  
Author(s):  
H. D. Barber
Keyword(s):  
Integrated Circuits ◽  
High Speed ◽  
Low Cost ◽  
Chemical Vapor ◽  
Low Noise ◽  
Isolation Techniques ◽  
Propagation Delays ◽  
Technological Barriers ◽  
On Chip ◽  
Bipolar Device

Silicon bipolar device technologies provided 65% of the world's integrated circuits in 1983. Where low noise, high current, low or high voltage, high speed or low cost are required, bipolar technologies are used. This paper will review the present status of bipolar device technologies, which make possible 100-ps gate-propagation delays, 150-μm2 gate areas, 1-GHz bandwidth amplifiers, on-chip control of over 1-A, 350-V operation, 14-GHz fT's and 10-ns. analogue-to-8-bit digital conversion. These devices are realized because of advances in isolation techniques, chemical-vapor deposition, photolithography, diffusion, ion implantation, conductor–contact interconnection technology, etching processes, and materials preparation. This paper will discuss some of the fundamental problems, modelling difficulties, and technological barriers that will impact the future development of bipolar integrated circuits.

scholarly journals Passivity Preserving Model Order Reduction Using the Reduce Norm Method

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 964
Author(s):  
Namra Akram ◽  
Mehboob Alam ◽  
Rashida Hussain ◽  
Asghar Ali ◽  
Shah Muhammad ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Integrated Circuit ◽  
Model Order Reduction ◽  
High Speed ◽  
Order Reduction ◽  
Reliable Operation ◽  
Model Order ◽  
Reduced Order ◽  
Reduction Methods ◽  
On Chip

Modeling and design of on-chip interconnect, the interconnection between the components is becoming the fundamental roadblock in achieving high-speed integrated circuits. The scaling of interconnect in nanometer regime had shifted the paradime from device-dominated to interconnect-dominated design methodology. Driven by the expanding complexity of on-chip interconnects, a passivity preserving model order reduction (MOR) is essential for designing and estimating the performance for reliable operation of the integrated circuit. In this work, we developed a new frequency selective reduce norm spectral zero (RNSZ) projection method, which dynamically selects interpolation points using spectral zeros of the system. The proposed reduce-norm scheme can guarantee stability and passivity, while creating the reduced models, which are fairly accurate across selected narrow range of frequencies. The reduced order results indicate preservation of passivity and greater accuracy than the other model order reduction methods.

A 9-Gbit/s Serial Transceiver for On-Chip Global Signaling Over Lossy Transmission Lines

2009 ◽  
Vol 56 (8) ◽  
pp. 1807-1817 ◽  
Author(s):  
JunYoung Park ◽  
J. Kang ◽  
Sunghyun Park ◽  
M.P. Flynn
Keyword(s):  
Transmission Lines ◽  
Lossy Transmission ◽  
On Chip

Single Electronics for Biomedical Applications

2017 ◽  
pp. 212-227
Author(s):  
Deep Kamal Kaur Randhawa
Keyword(s):  
Integrated Circuits ◽  
Biomedical Applications ◽  
High Speed ◽  
Focal Point ◽  
Power Saving ◽  
Digital Signal ◽  
Signal Acquisition ◽  
Single Electronics ◽  
On Chip

The nanoelectronic circuits based on single electronics would revolutionise the new generation electronic bio-medical gadgets. The high speed nanoelectronic devices would make these gadgets faster and more accurate. The nanoelectronic integrated circuits would be a boon for power saving along with advanced portability. As the scaling down of silicon based integrated circuits is limited in nanometer regime alternative materials like organic molecules, polymers, carbon nanotubes and graphene are focal point of research. These materials exhibit various electrical, electronic and mechanical properties, flexibility being one of very significant ones. Flexible nanelectronic integrated circuits would make biomedical applications very patient friendly. The in-vivo examination and diagnosis would be less injurious to the body. Also the flexible nature will increase the maneuverability of the device by the operator. It will improve the targeted diagnosis and targeted drug delivery procedures. This would further facilitate system-on- chip (soc) that will integrate multiple biomedical signal acquisition (ECG, EEG, EP, and respiration-related signals) with on-chip digital signal processing.

High-speed signal propagation on lossy transmission lines

1990 ◽  
Vol 34 (4) ◽  
pp. 601-615 ◽  
Author(s):  
A. Deutsch ◽  
G. V. Kopcsay ◽  
V. A. Ranieri ◽  
J. K. Cataldo ◽  
E. A. Galligan ◽  
...  
Keyword(s):  
Transmission Lines ◽  
High Speed ◽  
Signal Propagation ◽  
Lossy Transmission
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