Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs

VLSI Design ◽

10.1155/2010/297083 ◽

2010 ◽

Vol 2010 ◽

pp. 1-12 ◽

Cited By ~ 10

Author(s):

Reza Hashemian

Keyword(s):

Analog Circuits ◽

Analog Circuit ◽

Linear Models ◽

Circuit Analysis ◽

New Technique ◽

A New Technique ◽

Nonlinear Components ◽

Operating Points

A new technique is presented for biasing of analog circuits. The biasing design begins with local biasing of the nonlinear components (transistors), done according to the pre-specified operating points (OPs) and for the best performance of the circuit. Next, the transistors are replaced with their linear models to perform the AC design. Upon finishing with the AC design we need to move from the local biasing to global (normal) biasing while the OPs are kept unchanged. Here fixators—nullators plus sources—are shown to be very instrumental and with norators—as the place holders for the DC supplies in the circuit—they make pairs. The solution of the circuit so prepared provides the DC supplies at the designated locations in the circuit. The rules to engage in circuit analysis with fixator-norator pairs are discussed, and numerous pitfalls in this line are specified. Finally, two design examples are worked out that clearly demonstrate the capability and power of the proposed technique for biasing any analog circuit.

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Modeling Mechanical Stick-Slip Friction Using Electrical Circuit Analysis

Journal of Dynamic Systems Measurement and Control ◽

10.1115/1.3152710 ◽

1988 ◽

Vol 110 (4) ◽

pp. 440-443 ◽

Cited By ~ 5

Author(s):

Paul J. Kolston

Keyword(s):

Mechanical System ◽

Mechanical Systems ◽

Electrical Circuit ◽

Circuit Analysis ◽

New Technique ◽

Analysis Program ◽

Stick Slip ◽

A New Technique ◽

Vast Range

A new technique for modeling stick-slip friction in mechanical systems is proposed. The technique uses an electrical circuit analysis program to analyze the electrical circuit equivalent of the mechanical system. The stick-slip characteristic can be altered to take almost any form. The method is easy to apply to a vast range of systems, and two examples are given to illustrate its validity.

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Picosecond Imaging Circuit Analysis of the IBM G6 Microprocessor Cache

ISTFA 1999: Conference Proceedings from the 25th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa1999p0035 ◽

1999 ◽

Author(s):

Moyra McManus ◽

Pia Sanda ◽

Steven Steen ◽

Dan Knebel ◽

Dennis Manzer ◽

...

Keyword(s):

Circuit Analysis ◽

Vlsi Circuits ◽

New Technique ◽

High Frequencies ◽

Early Design ◽

Race Condition ◽

Self Test ◽

Built In Self Test ◽

Control Circuits ◽

A New Technique

Abstract Picosecond Imaging Circuit Analysis (PICA) is a new technique shown here to be applicable to the analysis of complex VLSI circuits. PICA was used to diagnose a timing failure in the early design of the G6 microprocessor chip. The fault occurred at high frequencies upon consecutive writes. Using PICA, combined with programmable array built-in self test (RAMBIST) techniques, the problem was traced to a race condition in the write control circuits. This allowed timely correction of the design for product implementation.

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Using Pathological Elements in Analog Circuit Analysis and Simulation

Carpathian Journal of Electronic and Computer Engineering ◽

10.2478/cjece-2020-0006 ◽

2020 ◽

Vol 13 (2) ◽

pp. 1-6

Author(s):

Alexandru Grib ◽

Zoltan Erdei ◽

Mihaela Cristina Turcu ◽

Alina Constantin ◽

Mihai Iordache

Keyword(s):

Analog Circuits ◽

Analog Circuit ◽

Current Source ◽

Simulation Software ◽

Circuit Analysis ◽

State Equations ◽

Circuit Element ◽

Active Devices ◽

Zero Current ◽

Zero Voltage

Abstract This paper is focused on some kind of mystery circuit nullator, nullor, current mirror, and voltage mirror, all of them known as pathological elements. These pathological elements can be used to perform circuit modelling, symbolic circuit analysis, circuit synthesis, circuit design and to develop applications that involve modern active devices. It is described a new modeling of nullor-based active devices from the circuit abstraction level. In this paper it is presented the way all types of equations which describe the circuit containing nullors can be directly formulated from the diagrams of these circuits if we took into account that a nullator is an over-determined two-port circuit element (zero voltage, zero current) and the norator is an undetermined two-port circuit element (any voltage and any current). To simulate the nullors with ideal voltage controlled voltage sources, ec = Ac_c uc, with the control gate an ideal independent current source, jC = 0.0 A and with the amplification (transfer) factor Ac_C very big (theoretically ∞), the analog circuits with nullors can be analyzed by using any of the existing simulation software. By this way, it was possible the elaboration of efficient algorithms for an automatic formulation of Kirchhoff’s equations, of loop equations, of modified nodal equations and of state equations for circuits with pathological elements. These procedures can be easily implemented in dedicated programs for the simulations of the complex analog circuits with pathological elements. The example presented in this paper validates the presented models for nullors.

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