Discrete Electronic Warfare Signal Processing using Compressed Sensing Based on Random Modulator Pre-Integrator

2015 ◽  
Vol 65 (6) ◽  
pp. 472 ◽  
Author(s):  
M. Sreenivasa Rao ◽  
Chandan C. Mishra ◽  
K. Krishna Naik ◽  
K. Maheshwara Reddy
Keyword(s):  
Signal Processing ◽  
Input Signal ◽  
High Speed ◽  
Traditional Approach ◽  
Ultra Wideband ◽  
Radar Signal ◽  
Electromagnetic Spectrum ◽  
Electronic Warfare ◽  
High Speed Adc ◽  
Detection Of Signals

Electronic warfare receiver works in the wide electromagnetic spectrum in dense radar signal environment. Current trends in radar systems are ultra wideband and low probability of intercept radar technology. Detection of signals from various radar stations is a concern. Performance and probability of intercept are mainly dependent on high speed ADC technology. The sampling and reconstruction functions have to be optimized to capture incoming signals at the receiver to extract characteristics of the radar signal. The compressive sampling of the input signal with orthonormal base vectors, projecting the basis in the union of subspaces and recovery through convex optimisation techniques is the current traditional approach. Modern trends in signal processing suggest the random modulator pre-integrator (RMPI), which sample the input signal at information rate non-adaptively and recovery by the processing of discrete and finite vectors. Analysis of RMPI theory, application to EW receiver, simulation and recovery of EW receiver signals are discussed.

Design of Virtex-7 FPGA-Based High-Speed Signal Processor Carrier Board

2015 ◽  
Vol 719-720 ◽  
pp. 534-537
Author(s):  
Wen Hua Ye ◽  
Huan Li
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
High Speed ◽  
Processing System ◽  
Digital Signal ◽  
Signal Processing System ◽  
High Speed Adc ◽  
High Speed Data ◽  
Processor Speed ◽  
Signal Processor

With the development of digital signal processing technology, the demand on the signal processor speed has become increasingly high. This paper describes the hardware design of carrier board in high-speed signal processing module, which using Xilinx's newest Virtex-7 FPGA family XC7VX485T chip, and applying high-speed signal processing interface FMC to transport and communicate high-speed data between carrier board and daughter card with high-speed ADC and DAC. This design provides a hardware implementation and algorithm verification platform for high-speed digital signal processing system.

Methods and Algorithms for Technical Vision in Radar Introscopy

2019 ◽  
pp. 373-391
Author(s):  
Oleg Sytnik ◽  
Vladimir Kartashov
Keyword(s):  
Signal Processing ◽  
Processing Technique ◽  
Ultra Wideband ◽  
Radar Signal ◽  
Signal Spectrum ◽  
Signal Processing Technique ◽  
Distinctive Features ◽  
Technical Vision ◽  
Probing Signal ◽  
Radio Vision

Optimization of technical characteristics of radio vision systems is considered in the radars with ultra-wideband sounding signals. Highly noisy conditions, in which such systems operate, determine the requirements that should be met by the signals being studied. The presence of the multiplicative noise makes it difficult to design optimal algorithms of echo-signal processing. Consideration is being given to the problem of discriminating objects hidden under upper layers of the ground at depths comparable to the probing pulse duration. Based upon the cepstrum and textural analysis, a subsurface radar signal processing technique has been suggested. It is shown that, however the shape of the probing signal spectrum might be, the responses from point targets in the cepstrum images of subsurface ground layers make up the texture whose distinctive features enable objects to be detected and identified.

A review of radar signals in terms of Doppler tolerance, time-sidelobe level, and immunity against jamming

2018 ◽  
Vol 10 (10) ◽  
pp. 1134-1142 ◽  
Author(s):  
Samer Baher Safa Hanbali
Keyword(s):  
High Speed ◽  
Pulse Compression ◽  
Power Transmission ◽  
Short Pulse ◽  
Radar Signal ◽  
Sidelobe Level ◽  
Compression Technique ◽  
Electronic Warfare ◽  
Tolerance Time ◽  
Radar Signals

AbstractPulse compression technique allows a radar to achieve the resolution of a short pulse and the energy of a long pulse simultaneously, without the requirement of high-power transmission. Therefore, pulse compression radars have a low probability of intercept capability. The common types of pulse compression signals are frequency modulated waveforms and phase-coded waveforms, which have different properties. The optimum radar signal should have good immunity against deceptive jamming, good Doppler tolerance to detect high-speed targets, and low time-sidelobe level to detect weak targets nearby the strong ones. This paper reviews the current research in the commonly used radar signals, and presents their pros and cons, and compares between them in terms of Doppler tolerance, time-sidelobe level, as well as immunity against jamming in order to provide a reference for the researchers in the field of radar systems and electronic warfare.

scholarly journals Electromagnetic Occlusion Algorithm Based on FPGA and Panel Grouping and Its Optimization

2021 ◽  
Vol 2021 ◽  
pp. 1-10
Author(s):  
Junfeng Ge ◽  
Ning Li ◽  
Jianying Cao
Keyword(s):  
Signal Processing ◽  
Multiple Scattering ◽  
High Speed ◽  
Rapid Development ◽  
Science And Technology ◽  
Radar Signal ◽  
Surface Element ◽  
Time Signal ◽  
Radar Signal Processing ◽  
Stealth Technology

With the development of digital signal processing and advanced algorithms, real-time signal processing based on FPGA and DSP is suitable for high-speed radar signal processing. With the rapid development of science and technology, war has entered the information age guided by high technology, and advanced science and technology has played a vital role in the trend of war. In recent years in the modern war, many countries invest a lot of research effort on the stealth technology, and advanced stealth technology can use a variety of technical means to alter or weaken the feature information of the target, confuse the enemy radar detection system effectively, reduce the chance of being detected to the largest extent, and prolong the lifecycle of aircraft and weapons. This research mainly discusses the electromagnetic occlusion algorithm and its optimization based on FPGA and panel grouping. The FPGA model selected for this study is XC6VLX240T-1FF1156I. Because the amount of data processed here is not very large, the cache part directly uses the on-chip storage resources of the FPGA, and the AD device is used to perform analog-to-digital/digital-to-analog conversion on the signal and perform digital up-down conversion. For a facet, it is necessary to first verify whether it is a bright facet and set the flag to mark it, then the facet needs to be occluded with the triangular facet marked as a bright facet, and all bright facets that have been marked need to be traversed. Open MP parallelization of the occlusion algorithm is as follows: The physical optics method is used to calculate the target RCS, and the focus of parallelism is placed on the part with a large amount of calculation. When using Open MP to design a program on a multicore computer, each group is assigned a thread to give full play to the core computing power. The total field is scattered and superimposed by each surface element. This part uses the parallel processing mode of Open MP, which allows the panel judgment in the group to be carried out at the same time. This part requires schedule to allocate resources and use different parallel mechanisms for different calculations to optimize debugging. In the angular range where there is multiple scattering at 0 ° ≤ φ ≤ 90 ° , the calculation results and the measurement results are in good agreement, and when the two planes are simulated with 1820 triangular faces, the fast multiple scattering in this paper only needs 4 minutes. This research has realized the general radar signal processing method based on FPGA structure, and the design has important engineering realization significance.

scholarly journals Design and Implementation Pulse Compression for S-Band Surveillance Radar

2020 ◽  
Vol 7 (1) ◽  
pp. 20
Author(s):  
Kalfika Yani ◽  
Fiky Y Suratman ◽  
Koredianto Usman
Keyword(s):  
Signal Processing ◽  
High Speed ◽  
Pulse Compression ◽  
Continuous Wave ◽  
Radar Signal ◽  
Radar Signal Processing ◽  
Digital Platform ◽  
Range Resolution ◽  
Pulse Compression Radar ◽  
Cw Radar

The radar air surveillance system consists of 4 main parts, there are antenna, RF front-end, radar signal processing, and radar data processing. Radar signal processing starts from the baseband to IF section. The radar waveform consists of two types of signal, there are continuous wave (CW) radar, and pulse compression radar [1]. Range resolution for a given radar can be significantly improved by using very short pulses. Pulse compression allows us to achieve the average transmitted power of a relatively long pulse, while obtaining the range resolution corresponding to a short pulse. Pulse compression have compression gain. With the same power, pulse compression radar can transmit signal further than CW radar. In the modern radar, waveform is implemented in digital platform. With digital platform, the radar waveform can optimize without develop the new hardware platform. Field Programmable Gate Array (FPGA) is the best platform to implemented radar signal processing, because FPGA have ability to work in high speed data rate and parallel processing. In this research, we design radar signal processing from baseband to IF using Xilinx ML-605 Virtex-6 platform which combined with FMC-150 high speed ADC/DAC.

scholarly journals MIMO Radar Parallel Simulation System Based on CPU/GPU Architecture

Sensors ◽  
2022 ◽  
Vol 22 (1) ◽  
pp. 396
Author(s):  
Gaogao Liu ◽  
Wenbo Yang ◽  
Peng Li ◽  
Guodong Qin ◽  
Jingjing Cai ◽  
...  
Keyword(s):  
Signal Processing ◽  
High Speed ◽  
Mimo Radar ◽  
Parallel Simulation ◽  
Simulation System ◽  
Coarse Grained ◽  
Radar Signal ◽  
Radar Signal Processing ◽  
Signal Processing Algorithm ◽  
Gpu Architecture

The data volume and computation task of MIMO radar is huge; a very high-speed computation is necessary for its real-time processing. In this paper, we mainly study the time division MIMO radar signal processing flow, propose an improved MIMO radar signal processing algorithm, raising the MIMO radar algorithm processing speed combined with the previous algorithms, and, on this basis, a parallel simulation system for the MIMO radar based on the CPU/GPU architecture is proposed. The outer layer of the framework is coarse-grained with OpenMP for acceleration on the CPU, and the inner layer of fine-grained data processing is accelerated on the GPU. Its performance is significantly faster than the serial computing equipment, and satisfactory acceleration effects have been achieved in the CPU/GPU architecture simulation. The experimental results show that the MIMO radar parallel simulation system with CPU/GPU architecture greatly improves the computing power of the CPU-based method. Compared with the serial sequential CPU method, GPU simulation achieves a speedup of 130 times. In addition, the MIMO radar signal processing parallel simulation system based on the CPU/GPU architecture has a performance improvement of 13%, compared to the GPU-only method.

Design of Master Controller Input Processing Method Based on LPC2292

2012 ◽  
Vol 182-183 ◽  
pp. 611-613
Author(s):  
Hui Yan ◽  
Lin Yu
Keyword(s):  
Operating System ◽  
Signal Processing ◽  
Input Signal ◽  
High Speed ◽  
External Environment ◽  
Processing Method ◽  
Input Processing ◽  
Processing Data ◽  
Master Controller ◽  
System Task

Because of external environment or man-made factors influence, the input signal and data of master elevator controller can not be judged and computed basis directly, but needs the corresponding processing .Therefore an operating system task should be assigned for input signal processing data, in order to deal with input signal. In this paper it realized switch quantity software filter and processing, analog quantities and high-speed counting input treatment of elevator master controller based on LPC2292 .

Design and Implementation of High Speed and Real-Time SAR Signal Processing Module Based on TMS320C6678

2014 ◽  
Vol 556-562 ◽  
pp. 4313-4316 ◽  
Author(s):  
Yang Feng ◽  
Shan Qing Hu ◽  
Qing Li ◽  
Teng Long
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
High Speed ◽  
Processing System ◽  
Radar Signal ◽  
Time Signal ◽  
Mass Storage ◽  
Processing Module ◽  
Airborne Sar ◽  
Signal Processing Module

In order to meet the requirements of high speed and real-time in SAR processing system, as well as breaking the bondage that traditional processing board is subject to the algorithm. This paper designs a generic mass storage real-time signal processing module with TI's latest multi-core DSP-TMS320C6678 based on OpenVPX high-speed serial bus standard. This module has standardized, modularized, reconfigurable characteristics. This paper discusses the design of this module and the implementation of typical parallel SAR imaging algorithm mapping on this module. This peocessing module has been applied in a variety of airborne SAR radar signal processing systems and fully validated its powerful processing ability and versatility.

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