Low-temperature fabrication of high-quality (Ba, Sr)TiO3 films using charged liquid cluster beam method

2002 ◽  
Vol 17 (8) ◽  
pp. 1888-1891 ◽  
Author(s):  
Hyungsoo Choi ◽  
Sungho Park ◽  
Yi Yang ◽  
HoChul Kang ◽  
Kyekyoon (Kevin) Kim ◽  
...  
Keyword(s):  
Dielectric Constant ◽  
Low Temperature ◽  
Cluster Beam ◽  
High Quality ◽  
Carboxylate Ligands ◽  
Si Substrates ◽  
Beam Method ◽  
Temperature Deposition ◽  
Bst Films ◽  
Substrate Temperatures

Low-temperature deposition of high-quality (Ba, Sr)TiO3 (BST) thin films was achieved in air on Pt/Ti/SiO2/Si substrates using the charged liquid cluster beam (CLCB) method. The Ba, Sr, and Ti precursors were synthesized using alkoxy carboxylate ligands to tailor their physical properties to the CLCB process. The as-deposited BST films fabricated at substrate temperatures as low as 280 °C exhibited high purity. The leakage current density and dielectric constant of the film, deposited at 300 °C and subsequently annealed at 700 °C, were 2.5 × 10−9 A/cm2 at 1.5 V and 305, respectively.

Low Temperature Deposition of Ba0.96Ca0.04Ti0.84Zr0.16O3 Thin Films on Pt Electrodes by RF Magnetron Sputtering

2003 ◽  
Vol 784 ◽  
Author(s):  
N. Cramer ◽  
Elliot Philofsky ◽  
Lee Kammerdiner ◽  
T. S. Kalkur
Keyword(s):  
Dielectric Constant ◽  
Magnetron Sputtering ◽  
Relative Dielectric Constant ◽  
Rf Magnetron Sputtering ◽  
Si Substrates ◽  
Ic Manufacturing ◽  
Pt Electrodes ◽  
Temperature Deposition ◽  
Current Densities ◽  
Substrate Temperatures

ABSTRACTBa0.96Ca0.04Ti0.84Zr0.16O3 (BCTZ) films acceptor-doped with 0.8 at. % Sc were deposited on Pt/TiO2/SiO2/Si substrates using rf magnetron sputtering. Substrate temperatures throughout the fabrication process remained at or below 450°C, which allows this process to be compatible with many materials commonly used in IC manufacturing. In addition, this process made no use of oxygen in the sputter gas or in annealing atmospheres and thus it remains compatible with easily oxidized materials. A relative dielectric constant of 166 was achieved along with a loss tangent of 0.006 to 0.17 at 10 kHz. The tunability of the dielectric constant was greater than 50 %. Leakage current densities of 1.6×10-8 A/cm2 were observed at 300K with 300 kV/cm of applied electric field. In comparison, Ba1-xSrxTiO3 (BST) films prepared under similar conditions show much greater leakage.

Low-Temperature Deposition of Pb(Zr,Ti)O3Thin Films on Si Substrates Using Ba(Mg1/3Ta2/3)O3as Buffer Layer

2004 ◽  
Vol 43 (8A) ◽  
pp. 5409-5413 ◽  
Author(s):  
Ying-Hao Chu ◽  
Chen-Wei Liang ◽  
Su-Jien Lin ◽  
Kuo-Shung Liu ◽  
I-Nan Lin
Keyword(s):  
Low Temperature ◽  
Buffer Layer ◽  
Si Substrates ◽  
Low Temperature Deposition ◽  
Temperature Deposition

Si/Si1−xGex p-Channel Mosfets Fabricated Using a Gate Quality Dielectric Process

1991 ◽  
Vol 220 ◽  
Author(s):  
V. P. Kesan ◽  
S. Subbanna ◽  
M. J. Tejwani ◽  
P. J. Restle ◽  
S. S. Iyer
Keyword(s):  
Low Temperature ◽  
Interface State ◽  
State Density ◽  
Channel Structure ◽  
Direct Oxidation ◽  
High Quality ◽  
Gate Oxides ◽  
Si Substrates ◽  
Dual Channel ◽  
High Transconductance

ABSTRACTThe use of Si1−xGex alloys for p-channel high transconductance MOSFETs requires a high quality dielectric system. Direct oxidation of Si1−xGex alloys or even low temperature deposition of SiO2 directly on Si1−xGex results in a very high interface state density. We show that low interface state densities (below 1011 eV−1cm−2) can be obtained using both thermal and PECVD oxides through the use of a thin (6–8 nm) Si cap between the oxide and the Si1-xGex layer. The Si cap layer leads to a sequential turn-on of the Si1−xGex channel and the Si cap channel, as clearly observed in low temperature C-V curves. We show that this dual channel structure can be designed to suppress the parasitic Si cap channel. High quality, fully isolated Si1−xGex p-channel MOSFETs have been fabricated in an integrable, low Dt process using both thermal or PECVD gate oxides and selective UHV/CVD for the Si/ Si1−xGex channels. We show that optimally designed Si/Si1−xGex MOSFETs exhibit up to 70% higher transconductance at 300K than control Si devices fabricated on n-doped 1017/cm3 Si substrates. Si/Si1−xGex p-channel MOSFETs with thermal and PECVD gate oxides show comparable device characteristics.

Low-temperature deposition of highly [100]-oriented MgO films using charged liquid cluster beam

2001 ◽  
Vol 396 (1-2) ◽  
pp. 23-28 ◽  
Author(s):  
S.H Rhee ◽  
Y Yang ◽  
H.S Choi ◽  
J.M Myoung ◽  
K Kim
Keyword(s):  
Low Temperature ◽  
Cluster Beam ◽  
Low Temperature Deposition ◽  
Temperature Deposition

Improvement in tunability and dielectric loss of (Ba0.5Sr0.5)TiO3 capacitors using seed layers on Pt/Ti/SiO2/Si substrates

2002 ◽  
Vol 17 (11) ◽  
pp. 2831-2836 ◽  
Author(s):  
Young-Ah Jeon ◽  
Woong-Chul Shin ◽  
Tae-Suck Seo ◽  
Soon-Gil Yoon
Keyword(s):  
Dielectric Constant ◽  
Dielectric Loss ◽  
Layer Thickness ◽  
Seed Layer ◽  
Root Mean Square Roughness ◽  
Si Substrates ◽  
Low Dielectric ◽  
Bst Films ◽  
Seed Layer Thickness ◽  
Seed Layers

The absence of a low dielectric constant layer at the barium strontium titanate (BST)/Pt interface and a decreased roughness are critical issues in the production of (Ba0.5Sr0.5)TiO3 thin films with high tunabilities and low losses. An improvement in dielectric properties was achieved by the insertion of seed layers at the BST/Pt interface by pulsed laser deposition. The higher tunability can be attributed to (100) texturing of the BST films, which is independent of grain size and grain morphologies, thus leading to a variation in seed layer thicknesses. The tunability and dielectric constant of 1600-Å-thick BST films showed a maximum of 53% and 720, respectively, at a seed layer thickness of 100 Å. Dielectric loss is dependent on the roughness of BST films and reached a minimum of 0.8% at a root mean square roughness of 28 Å. The maximum figures of merit, defined as the ratio of tunability to dielectric loss, of approximately 58 at 100 kHz and 198 kV/cm were obtained at a seed layer thickness of 70 Å. The optimized seed layer thickness for BST deposition onto Pt/Ti/SiO2/Si substrates plays an important role in maintaining the high tunabilities and low loss, which are suitable for microwave device applications.

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