Mechanisms for Defect Creation and Removal in Hydrogenated and Deuterated Amorphous Silicon Studied using Thin Film Transistors

It has been widely observed that thin film transistors (TFTs) incorporating an hydrogenated amorphous silicon (a-Si:H) channel exhibit a progressive shift in their threshold voltage with time upon application of a gate bias. This is attributed to the creation of metastable defects in the a-Si:H which can be removed by annealing the device at elevated temperatures with no bias applied to the gate, causing the threshold voltage to return to its original value. In this work, the defect creation and removal process has been investigated using both fully hydrogenated and fully deuterated amorphous silicon (a-Si:D) TFTs. In both cases, material was deposited by rf plasma enhanced chemical vapour deposition over a range of gas pressures to cover the a-g transition. The variation in threshold voltage as a function of gate bias stressing time, and annealing time with no gate bias, was measured. Using the thermalisation energy concept, it has been possible to quantitatively determine the distribution of energies required for defect creation and removal as well as the associated attempt-to-escape frequencies. The defect creation and removal process in a-Si:H is then discussed in the light of these results.