High energy-barrier for defect creation in thin-film transistors based on hot-wire amorphous silicon

1999 ◽  
Vol 75 (23) ◽  
pp. 3674-3676 ◽  
Author(s):  
B. Stannowski ◽  
R. E. I. Schropp ◽  
A. Nascetti
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Energy Barrier ◽  
High Energy ◽  
Hot Wire ◽  
High Energy Barrier ◽  
Defect Creation

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 424 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Mechanisms for Defect Creation and Removal in Hydrogenated and Deuterated Amorphous Silicon Studied using Thin Film Transistors

2006 ◽  
Vol 910 ◽  
Author(s):  
Andew Flewitt ◽  
Shufan Lin ◽  
William I Milne ◽  
Ralf B Wehrspohn ◽  
Martin J Powell
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Elevated Temperatures ◽  
Chemical Vapour ◽  
Rf Plasma ◽  
Gate Bias ◽  
Removal Process ◽  
Defect Creation

AbstractIt has been widely observed that thin film transistors (TFTs) incorporating an hydrogenated amorphous silicon (a-Si:H) channel exhibit a progressive shift in their threshold voltage with time upon application of a gate bias. This is attributed to the creation of metastable defects in the a-Si:H which can be removed by annealing the device at elevated temperatures with no bias applied to the gate, causing the threshold voltage to return to its original value. In this work, the defect creation and removal process has been investigated using both fully hydrogenated and fully deuterated amorphous silicon (a-Si:D) TFTs. In both cases, material was deposited by rf plasma enhanced chemical vapour deposition over a range of gas pressures to cover the a-g transition. The variation in threshold voltage as a function of gate bias stressing time, and annealing time with no gate bias, was measured. Using the thermalisation energy concept, it has been possible to quantitatively determine the distribution of energies required for defect creation and removal as well as the associated attempt-to-escape frequencies. The defect creation and removal process in a-Si:H is then discussed in the light of these results.

Hot-Wire Deposited Amorphous Silicon Thin-Film Transistors

1996 ◽  
Vol 420 ◽  
Author(s):  
R. E. I. Schropp ◽  
K. F. Feenstra ◽  
C. H. M. Van Der Werf ◽  
J. Holleman ◽  
H. Meiling
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Current Crowding ◽  
Hot Wire ◽  
Saturation Regime ◽  
Silicon Thin Film ◽  
Order Of Magnitude

AbstractWe present the first thin film transistors (TFTs) incorporating a low hydrogen content (5 - 9 at.-%) amorphous silicon (a-Si:H) layer deposited by the Hot-Wire Chemical Vapor Deposition (HWCVD) technique. This demonstrates the possibility of utilizing this material in devices. The deposition rate by Hot-Wire CVD is an order of magnitude higher than by Plasma Enhanced CVD. The switching ratio for TFTs based on HWCVD a-Si:H is better than 5 orders of magnitude. The field-effect mobility as determined from the saturation regime of the transfer characteristics is still quite poor. The interface with the gate dielectric needs further optimization. Current crowding effects, however, could be completely eliminated by a H2 plasma treatment of the HW-deposited intrinsic layer. In contrast to the PECVD reference device, the HWCVD device appears to be almost unsensitive to bias voltage stressing. This shows that HW-deposited material might be an approach to much more stable devices.

Hot-wire CVD a-Si:H TFT on Plastic Substrates

2006 ◽  
Vol 910 ◽  
Author(s):  
Farhad Taghibakhsh ◽  
K.S. Karim
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Amorphous Silicon ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Gate Dielectric ◽  
Chemical Vapor ◽  
Plastic Substrate ◽  
Hot Wire ◽  
Low Leakage

AbstractFabrication of hot-wire chemical vapor deposition (HWCVD) of amorphous silicon (a-Si) thin film transistors (TFT) on thin polyamide sheets is reported. A single graphite filament at 1500 °C was used for HWCVD and device quality amorphous silicon films were deposited with no thermal damage to plastic substrate. Top-gate staggered thin film transistors (TFTs) were fabricated at 150°C using hot-wire deposited a-Si channel, Plasma enhanced chemical vapor deposition (PECVD) silicon nitride gate dielectric, and microcrystalline n+ drain/source contacts. Low leakage current of 5×10-13 A, high switching current ratio of 1.3×107, and small sub threshold swing of 0.3 V/dec was obtained for TFTs with aspect ratio of 1300μm/100μm. The field effect mobility was extracted to be 0.34 cm2/V.s.

scholarly journals A Comparison between Thin-Film Transistors Deposited by Hot-Wire Chemical Vapor Deposition and PECVD

10.30544/128 ◽  
2015 ◽  
Vol 21 (1) ◽  
pp. 7-14
Author(s):  
Meysam Zarchi ◽  
Shahrokh Ahangarani
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Amorphous Silicon ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Silicon Films ◽  
Intrinsic Stress ◽  
Hot Wire ◽  
Microcrystalline Silicon

The effect of new growth techniques on the mobility and stability of amorphous silicon (a-Si:H) thin film transistors (TFTs) has been studied. It was suggested that the key parameter controlling the field-effect mobility and stability is the intrinsic stress in the a-Si:H layer. Amorphous and microcrystalline silicon films were deposited by radiofrequency plasma enhanced chemical vapor deposition (RF-PECVD) and hot-wire chemical vapor deposition (HW-CVD) at 100 ºC and 25 ºC. Structural properties of these films were measured by Raman Spectroscopy. Electronic properties were measured by dark conductivity, σd, and photoconductivity, σph. For amorphous silicon films deposited by RF-PECVD on PET, photosensitivity's of >105 were obtained at both 100 º C and 25 ºC. For amorphous silicon films deposited by HW-CVD, a photosensitivity of > 105 was obtained at 100 ºC. Microcrystalline silicon films deposited by HW-CVD at 95% hydrogen dilution show σph~ 10-4 Ω-1cm-1, while maintaining a photosensitivity of ~102 at both 100 ºC and 25 ºC. Microcrystalline silicon films with a large crystalline fraction (> 50%) can be deposited by HW-CVD all the way down to room temperature.

Defect creation in amorphous-silicon thin-film transistors

1995 ◽  
Vol 52 (7) ◽  
pp. 4680-4683 ◽  
Author(s):  
C. F. O. Graeff ◽  
M. S. Brandt ◽  
M. Stutzmann ◽  
M. J. Powell
Keyword(s):  
Thin Film ◽  
Amorphous Silicon ◽  
Thin Film Transistors ◽  
Silicon Thin Film ◽  
Defect Creation

Thin-Film Transistors based on Hot-Wire Amorphous Silicon on Silicon Nitride

1999 ◽  
Vol 557 ◽  
Author(s):  
B. Stannowski ◽  
H. Meiling ◽  
A. M. Brockhoff ◽  
R. E. I. Schropp
Keyword(s):  
Thin Film ◽  
Chemical Vapor Deposition ◽  
Silicon Nitride ◽  
Glow Discharge ◽  
Silicon Dioxide ◽  
Amorphous Silicon ◽  
Vapor Deposition ◽  
Thin Film Transistors ◽  
Chemical Vapor ◽  
Hot Wire

AbstractWe present state-of-the-art thin-film transistors (TFTs) incorporating amorphous silicon i-layers deposited by hot-wire chemical vapor deposition. The TFTs are deposited on glow-discharge silicon nitride as well as on thermally-grown silicon dioxide. The devices on silicon nitride have a field-effect mobility above 0.7 cm2/Vs, a threshold voltage around 2 V and a sub-threshold slope as low as 0.5 V/dec. As commonly observed, the TFTs on silicon-dioxide have higher values for the threshold voltage and the sub-threshold slope. In the annealed state the hot-wire TFTs show almost the same properties as TFTs deposited by conventional plasma-enhanced chemical vapor deposition. Nevertheless, the stress-time dependent behavior under prolonged gate-voltage stress at elevated temperature is different from that of the glow-discharge devices. The hot-wire TFTs are clearly more stable than their glow-discharge counterparts. Furthermore, we found differences in the stress behavior of the hot-wire TFTs deposited on silicon nitride and silicon dioxide.

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