Deep Level Transient Spectroscopy of Defects Induced by the Combination of CF4 Reactive Ion Etching and Oxidation in Metal-Oxide-Silicon Capacitors.

Deep Level ◽

Reactive Ion Etching ◽

Interface States ◽

Ion Etching ◽

Mos Capacitors ◽

Metal Oxide Silicon ◽

Transient Spectroscopy ◽

ABSTRACTMetal-Oxide-silicon (MOS) capacitors have been fabricated on CFb reactive ion etched silicon (n and p types) in order to study the defects at the Si-Si02 interface and in the bulk of the substrate, produced by the combination of reactive ion etching (RIE) and oxidation. Bulk defects and fast interface states are analysed by Deep Level Transient Spectroscopy (DLTS) and the slow interface states in the oxide layer near the interface are probed by Tunnel-DLTS. A density of fast interface states in the range 1010-1011 cm−2 eV−1 is observed for capacitors (both n and p types) fabricated with either dry or wet oxidations, and is probably due to disrupted or strained bonds at the Si-SiO2 interface. The observation of bulk defects in the wet-RIE oxide samples but not in the dry-RIE oxide samples may be related to the shorter oxidation time for wet oxides (31mn) compared to dry oxides(190mn) and explained by a greater annealing of RIE induced defects during the dry oxidation. The bulk traps are identified to be related to carbon contamination, in SiC form, introduced during RIE. Finally, an increase of the slow interface states density is observed for the n-type dry oxide samples.

Reactive-Ion-Etching Induced Deep Levels Observed in n-Type and p-Type 4H-SiC

Materials Science Forum ◽

10.4028/www.scientific.net/msf.645-648.759 ◽

2010 ◽

Vol 645-648 ◽

pp. 759-762

Author(s):

Koutarou Kawahara ◽

Giovanni Alfieri ◽

Michael Krieger ◽

Tsunenobu Kimoto

Keyword(s):

Deep Level ◽

Reactive Ion Etching ◽

Deep Levels ◽

Total Density ◽

Ion Etching ◽

Initial Concentration ◽

Grown Sample ◽

Transient Spectroscopy ◽

P Type

In this study, deep levels are investigated, which are introduced by reactive ion etching (RIE) of n-type/p-type 4H-SiC. The capacitance of as-etched p-type SiC is remarkably small due to compensation or deactivation of acceptors. These acceptors can be recovered to the initial concentration of the as-grown sample after annealing at 1000oC. However, various kinds of defects remain at a total density of ~5× 1014 cm-3 in a surface-near region from 0.3 μm to 1.0 μm even after annealing at 1000oC. The following defects are detected by Deep Level Transient Spectroscopy (DLTS): IN2 (EC – 0.35 eV), EN (EC – 1.6 eV), IP1 (EV + 0.35 eV), IP2 (HS1: EV + 0.39 eV), IP4 (HK0: EV + 0.72 eV), IP5 (EV + 0.75 eV), IP7 (EV + 1.3 eV), and EP (EV + 1.4 eV). These defects generated by RIE can be significantly reduced by thermal oxidation and subsequent annealing at 1400oC.

Defects Induced by Reactive Ion Etching in Ge Substrate

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.896.241 ◽

2014 ◽

Vol 896 ◽

pp. 241-244

Author(s):

Kusumandari ◽

Noriyuki Taoka ◽

Wakana Takeuchi ◽

Mitsuo Sakashita ◽

Osamu Nakatsuka ◽

...

Keyword(s):

Defect Formation ◽

Deep Level ◽

Reactive Ion Etching ◽

The Other ◽

Ion Etching ◽

Ar Plasma ◽

Transient Spectroscopy ◽

Electron And Hole Traps ◽

Dlts Spectra

We investigated impacts of the Ar and CF4　plasma during reactive ion etching (RIE) on defect formation in the Ge substrates using the deep-level-transient-spectroscopy (DLTS) technique. It was found that the Ar plasma causes the roughening of the Ge surface. Moreover, the Ar plasma induces a defect with an energy level of 0.31 eV from the conduction band minimum in the Ge substrate, confirming by DLTS spectra. On the other hand, the CF4plasma hardly induces the surface roughness of Ge. However, the CF4plasma induces many kinds of electron and hole traps. It should be noted that the defects associated with Sb and interstitials are widely distributed to around 3-µm.

Constant Capacitance Deep-Level Transient Spectroscopy Study of Bulk Traps and Interface States in P Implanted Si MOS Capacitors

Conference on Optoelectronic and Microelectronic Materials and Devices, 2004. ◽

10.1109/commad.2004.1577505 ◽

2006 ◽

Author(s):

B.J. Villis ◽

J.C. McCallum ◽

M.D.H. Lay ◽

E. Gauja

Keyword(s):

Deep Level ◽

Interface States ◽

Spectroscopy Study ◽

Mos Capacitors ◽

Transient Spectroscopy

Deep Level Transient Spectroscopy Technique to Analyze Radiation Induced Defects in Power Transistors

10.1063/1.3606235 ◽

2011 ◽

Author(s):

A. P. Gnana Prakash ◽

Alka B. Garg ◽

R. Mittal ◽

R. Mukhopadhyay

Keyword(s):

Deep Level ◽

Spectroscopy Technique ◽

Power Transistors ◽

Radiation Induced ◽

Transient Spectroscopy ◽

Time‐dependent response of interface states in indium phosphide metal–insulator–semiconductor capacitors investigated with constant‐capacitance deep‐level transient spectroscopy

Journal of Applied Physics ◽

10.1063/1.332582 ◽

1983 ◽

Vol 54 (7) ◽

pp. 4014-4021 ◽

Cited By ~ 66

Author(s):

P. van Staa ◽

H. Rombach ◽

R. Kassing

Keyword(s):

Indium Phosphide ◽

Deep Level ◽

Interface States ◽

Time Dependent ◽

Metal Insulator ◽

Metal Insulator Semiconductor ◽

Transient Spectroscopy

Process-Induced Defects in High-Purity GaAs

MRS Proceedings ◽

10.1557/proc-14-283 ◽

1982 ◽

Vol 14 ◽

Cited By ~ 1

Author(s):

P. H. Campbell ◽

O. Aina ◽

B. J. Baliga ◽

R. Ehle

Keyword(s):

High Temperature ◽

High Purity ◽

Deep Level ◽

Deep Levels ◽

Schottky Contacts ◽

High Temperature Annealing ◽

Order Of Magnitude ◽

Transient Spectroscopy ◽

ABSTRACTHigh temperature annealing of Si 3 N4 and SiO2 capped high purity LPE GaAs is shown to result in a reduction in the surface carrier concentration by about an order of magnitude. Au Schottky contacts made on the annealed samples were found to have severely degraded breakdown characteristics. Using deep level transient spectroscopy, deep levels at EC–.58eV, EC–.785eV were detected in the SiO2, capped samples and EC–.62eV, EC–.728eV in the Si3N4 capped Samples while none was detected in the unannealed samples.The electrical degradations are explained in terms of compensation mechanisns and depletion layer recombination-generation currents due to the deep levels.

A deep-level transient spectroscopy study of silicon interface states using different silicon nitride surface passivation schemes

Applied Physics Letters ◽

10.1063/1.3358140 ◽

2010 ◽

Vol 96 (10) ◽

pp. 103507 ◽

Cited By ~ 18

Author(s):

Chun Gong ◽

Eddy Simoen ◽

Niels Posthuma ◽

Emmanuel Van Kerschaver ◽

Jef Poortmans ◽

...

Keyword(s):

Silicon Nitride ◽

Surface Passivation ◽

Deep Level ◽

Interface States ◽

Spectroscopy Study ◽

Transient Spectroscopy ◽

Silicon Interface

The Influence of an In-Situ Electric Field on H+ and He+ Implantation Induced Defects in Silicon

MRS Proceedings ◽

10.1557/proc-316-105 ◽

1993 ◽

Vol 316 ◽

Cited By ~ 2

Author(s):

J. Ravi ◽

Yu. Erokhin ◽

S. Koveshnikov ◽

G.A. Rozgonyi ◽

C.W. White

Keyword(s):

Electric Field ◽

Deep Level ◽

Spectroscopy Technique ◽

Deep Traps ◽

Observed Behaviour ◽

Proton Implantation ◽

Transient Spectroscopy ◽

ABSTRACTThe influence of in-situ electronic perturbations on defect generation during 150 keV proton implantation into biased silicon p-n junctions has been investigated. The concentration and spatial distribution of the deep traps were characterized using a modification of the double corelation deep level transient spectroscopy technique (D-DLTS). With the in-situ electric field applied, a decrease in concentration of vacancy-related, as well as H-related, traps was observed. 500 keV He+ implantation was also performed to supplement the above studies and to differentiate any passivation effects due to hydrogen. A model based on the charge states of hydrogen and vacancies was used to explain the observed behaviour.