scholarly journals Portable Laser Photoacoustic Methane Sensor Based on FPGA

Author(s):  
Jianwei Wang ◽  
Huili Wang ◽  
Xianyong Liu

A portable laser photoacoustic sensor based on a Field-Programmable Gate Array (FPGA) is reported for methane detection. A tunable DFB diode laser in the 1654 nm wavelength range is used as an excitation source. The photoacoustic signal processing was implemented by a FPGA device. A small resonant photoacoustic cell is designed. The minimum detection limit (1σ) of 10 ppm for methane (CH4) is demonstrated.

2020 ◽  
Vol 91 (10) ◽  
pp. 104707
Author(s):  
Yinyu Liu ◽  
Hao Xiong ◽  
Chunhui Dong ◽  
Chaoyang Zhao ◽  
Quanfeng Zhou ◽  
...  

2012 ◽  
Vol 571 ◽  
pp. 534-537
Author(s):  
Bao Feng Zhang ◽  
De Hu Man ◽  
Jun Chao Zhu

The article proposed a new method for implementing linear phase FIR filter based on FPGA. For the key to implementing the FIR filter on FPGA—multiply-add operation, a parallel distributed algorithm was presented, which is based on LUT. The designed file was described with VHDL and realized on Altera’s field programmable gate array (FPGA), giving the design method. The experimental results indicated that the system can run stably at 120MHz or more, which can meet the requirements of signal processing for real-time.


Author(s):  
Marcos A. Funes ◽  
Matías N. Hadad ◽  
Patricio G. Donato ◽  
Daniel O. Carrica

The use of Field Programmable Gate Array (FPGA) devices in the signal processing field has been on a constant rise since the beginning of the last decade. In particular, in the field of signal processing applications, the implementation of methods and techniques for the detection of coded signals immersed in noise should be highlighted. In this chapter, focus is placed on a special type of coding known as Complementary Sequences, and on some of the coding schemes derived from them. These sequences have been employed in many different application fields, ranging from safety sensors and radar systems to communications and material characterization. Specifically, this chapter deals with issues related to algorithms improvement and to their implementation in FPGA platforms, with particular emphasis on hardware resources efficiency and on the reliability of the whole processing scheme.


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