scholarly journals Crime Severity and Constitutional Line-Drawing

2004 ◽  
Vol 90 (7) ◽  
pp. 1957 ◽  
Author(s):  
Eugene Volokh
Keyword(s):  
Author(s):  
J. Drucker ◽  
R. Sharma ◽  
J. Kouvetakis ◽  
K.H.J. Weiss

Patterning of metals is a key element in the fabrication of integrated microelectronics. For circuit repair and engineering changes constructive lithography, writing techniques, based on electron, ion or photon beam-induced decomposition of precursor molecule and its deposition on top of a structure have gained wide acceptance Recently, scanning probe techniques have been used for line drawing and wire growth of W on a silicon substrate for quantum effect devices. The kinetics of electron beam induced W deposition from WF6 gas has been studied by adsorbing the gas on SiO2 surface and measuring the growth in a TEM for various exposure times. Our environmental cell allows us to control not only electron exposure time but also the gas pressure flow and the temperature. We have studied the growth kinetics of Au Chemical vapor deposition (CVD), in situ, at different temperatures with/without the electron beam on highly clean Si surfaces in an environmental cell fitted inside a TEM column.


2013 ◽  
Author(s):  
Brent M. Wilson ◽  
Edmund Fantino ◽  
Stephanie Stolarz-Fantino ◽  
Laura Mickes
Keyword(s):  

2013 ◽  
Vol 13 (04) ◽  
pp. 1350017 ◽  
Author(s):  
KUMAR S. RAY ◽  
BIMAL KUMAR RAY

This paper applies reverse engineering on the Bresenham's line drawing algorithm [J. E. Bresenham, IBM System Journal, 4, 106–111 (1965)] for polygonal approximation of digital curve. The proposed method has a number of features, namely, it is sequential and runs in linear time, produces symmetric approximation from symmetric digital curve, is an automatic algorithm and the approximating polygon has the least non-zero approximation error as compared to other algorithms.


2021 ◽  
pp. 146247452198980
Author(s):  
Inna Levy ◽  
Keren Cohen-Louck ◽  
Sergio Herzog

The aim of the current research was to examine the contribution of crime type and severity as well as offender, observer, and victim characteristics to prediction of perception of community correction (CC) as an appropriate punishment. We conducted a telephone survey among Israeli citizens. A random and representative sample of 573 respondents, aged 20 to 74, evaluated the seriousness of crime scenarios and the appropriateness of CC for each scenario. In different versions of crime scenarios, we manipulated offence type as well as offender and victim characteristics. The results of a logistic regression indicate that perceived lower crime severity, a crime that is not murder, older offender age, and being a secular observer are related with an increased likelihood of supporting community corrections. The discussion addresses these findings in the context of punitive goals (e.g., revenge, retribution), public perception of offender dangerousness, and social identity theory.


Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.


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