scholarly journals Full-Silicon 98.7% Efficient Three-Phase Five-Level 3-port UPS Architecture with Wide Voltage Range Battery based on Multiplexed Topology

Author(s):  
Kepa Odriozola ◽  
Thierry A. Meynard ◽  
Alain Lacarnoy
Keyword(s):  
Electronics ◽  
2018 ◽  
Vol 7 (9) ◽  
pp. 167 ◽  
Author(s):  
Jin-Wook Kang ◽  
Seung-Wook Hyun ◽  
Jae-Ok Ha ◽  
Chung-Yuen Won

This paper investigates the fault-tolerance control of a multilevel cascaded NPC/H-bridge (CNHB) inverter. The fault-tolerance control method has been widely used for multilevel inverters, such as the neutral-point voltage-shifting control, which can operate for a certain period of time by compensating for the phase voltage of a faulty stack even if one stack is broken. Even though the three-phase equilibrium is maintained in the case of failure by using the conventional neutral-point voltage-shifting control, an imbalance in the output power occurs between each stack, which causes problems for maintenance and lifetime. Therefore, this paper proposes a fault-tolerance control that can maintain three-phase equilibrium in a case of stack failures and minimize power imbalances between the stacks. The problem of the conventional neutral-point voltage-shifting control is presented based on the output power. In addition, the power imbalance is improved by performing selective neutral-point voltage-shifting control according to the reference voltage range. To verify the principle and feasibility of the proposed neutral-point voltage-shifting control method, a simulation and an experiment are implemented with the CNHB inverter.


2021 ◽  
Author(s):  
Arpan Hota ◽  
sumon dhara ◽  
venu sonti ◽  
sachin jain ◽  
Vivek Agarwal

<p>Zero common mode voltage (ZCMV) space vector modulation (SVM) strategy applied to a three-phase multilevel inverter (MLI) eliminates the common mode voltage (CMV). However, the usage of ZCMV-SVM strategy reduces the number of levels in the output voltage and requires higher magnitude dc voltage source due to the reduced modulation depth of the employed PWM scheme. Moreover, the usage of a single dc-source in such systems may have issues with respect to capacitor voltage balancing. Taking into account all the above issues, a 3-level inverter solution is proposed in this manuscript. The complete details of the method used for developing the proposed solution using the ZCMV space vectors is also included in this paper. The proposed topology utilizes a unique combination of a T-type 3-level inverter and a switched-capacitor (SC) circuit to achieve ZCMV performance with a single dc-source of low magnitude at a reduced component count. Analysis of the CMV and terminal voltages along with the design of the SCs are presented in this paper. The proposed topology is compared with the existing topologies to prove its unique merits over the other 3LI solutions with ZCMV capability. All the claims are validated using simulation and experimental results.</p>



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