EOS (Electrical Overstress) – The Old, Unknown Phenomenon?

ISTFA 2012: Conference Proceedings from the 38th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2012p0156 ◽

2012 ◽

Author(s):

Peter Jacob

Keyword(s):

Electrostatic Discharge ◽

Failure Mechanisms ◽

System Level ◽

Device Failure ◽

Electrical Overstress ◽

Dominant Root

Abstract Frequently, Electrical Overstress (EOS) is understood in a similar context like Electrostatic Discharge (ESD). However, when looking deeper, only 3-5% of EOS failure signatures are caused by ESD. The dominant root causes can be found on system level – often inaccessible for the device failure analyst. However, switching procedures and sometimes-hidden inductance loads are the unconsidered and undiscovered problem makers. This paper reviews and highlights these failure mechanisms.

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Failure Analysis of Electrothermal Actuators Subjected to Electrical Overstress (EOS) and Electrostatic Discharge (ESD)

ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2004p0225 ◽

2004 ◽

Author(s):

Jeremy A. Walraven ◽

Richard Plass ◽

Michael S. Baker ◽

Michael J. Shaw

Keyword(s):

Electric Fields ◽

Microelectromechanical Systems ◽

Electrostatic Discharge ◽

Industrial Applications ◽

System Level ◽

Electrothermal Actuators ◽

Thermal Actuation ◽

Mems Technology ◽

Electrical Overstress ◽

Current Transients

Abstract Microelectromechanical systems (MEMS) that sense, think, and act are enabling technologies currently employed in many industrial applications. To operate these devices, a stimulus is required to produce motion. In MEMS, this stimulus may be thermal actuation using current to produce joule heating, or electrostatic actuation using voltages to create electric fields. To qualify MEMS technology, these devices must undergo repeated characterization and testing and at both the die and system level. Electrical overstress (EOS) and electrostatic discharge (ESD) are two important tests used to assess the robustness of a device to steady state and sharp voltage and current transients. Identifying the failure mechanism and understanding the root causes for failure is paramount to the overall improvement and success of any MEMS based system. In this paper we will focus on the effects of EOS and ESD events on surface micromachined polysilicon based electrothermal actuators fabricated using the SUMMiT V™ process.

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System Failure Analysis Process and Case Study

ISTFA 2006: Conference Proceedings from the 32nd International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2006p0026 ◽

2006 ◽

Author(s):

Nicholas Konkol

Keyword(s):

Failure Analysis ◽

Personal Computer ◽

Failure Mechanisms ◽

System Level ◽

System Failure ◽

Quality Improvements ◽

Analysis Process ◽

Electrical Overstress ◽

Type Of Failure

Abstract Failure analysis at the system level requires a well-defined process and methodology in order to drive quality improvements onto motherboards or other subsystems of a personal computer. This process needs to be structured around the type of failure mechanisms that an FA group desires to understand. This paper discusses a specific case study involving electrical overstress in a personal computer that impacted the motherboard of the system. The case study resulted in a solution to increase quality on motherboards in the context of electrical overstress prevention.

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A Methodology for Characterizing System-Level ESD Sensitivity

ISTFA 2004: Conference Proceedings from the 30th International Symposium for Testing and Failure Analysis ◽

10.31399/asm.cp.istfa2004p0277 ◽

2004 ◽

Author(s):

Marie-Pascale Chagny ◽

John A. Naoum

Keyword(s):

Electrostatic Discharge ◽

Computer Systems ◽

Electronic Equipment ◽

Experimental Methodology ◽

Computer Users ◽

System Level ◽

Permanent Damage ◽

Design Improvement ◽

Desktop Computers

Abstract Over the years, failures induced by an electrostatic discharge (ESD) have become a major concern for semiconductor manufacturers and electronic equipment makers. The ESD events that cause destructive failures have been studied extensively [1, 2]. However, not all ESD events cause permanent damage. Some events lead to recoverable failures that disrupt system functionality only temporarily (e.g. reboot, lockup, and loss of data). These recoverable failures are not as well understood as the ones causing permanent damage and tend to be ignored in the ESD literature [3, 4]. This paper analyzes and characterizes how these recoverable failures affect computer systems. An experimental methodology is developed to characterize the sensitivity of motherboards to ESD by simulating the systemlevel ESD events induced by computer users. The manuscript presents a case study where this methodology was used to evaluate the robustness of desktop computers to ESD. The method helped isolate several weak nets contributing to the failures and identified a design improvement. The result was that the robustness of the systems improved by a factor of 2.

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