electrical overstress
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2021 ◽  
Vol 36 (5) ◽  
pp. 505-512
Author(s):  
Ke Xu ◽  
Xing Chen ◽  
Zhenzhen Chen

Circuits design that meets various IEC electrical overstress (EOS) standards is still a challenge, for that different kinds of EOS are at different frequency bands. In this paper, a physics-based transient simulation and modeling method is proposed, which can simulate wide-frequency EOS including electrostatic discharge (ESD) and AC characteristics. In this method, the physical model is used to characterize the nonlinear semiconductor devices in the finite-difference time-domain (FDTD)-SPICE co-simulation. Moreover, the modeling and physical parameters extraction method of the ESD protect devices, the transient voltage suppressor diode, is demonstrated. Taking an EOS protection circuit for example, it is modeled and simulated by the proposed method. Moreover, the circuit is also simulated by the widely-used System-Efficient ESD Design (SEED) method, in which the TVS diode is modeled based on 100 ns Transmission Line Pulse (TLP) measurements. The experiments show that both this method and SEED method can characterize the IEC system-level ESD behaviors well. However, the error of the SEED is about 219.2% at 10 MHz AC characteristics, but the maximum error of the proposed method is only 7.8%. Hence, compared with the widely-used SEED method, this method is more accurate when characterizing the EOS event during AC operation and switching.


Author(s):  
Allan Norico ◽  
Rommel Estores

Abstract Some of the most challenging task in analyzing fractures is a die that has not been fully cracked apart and a cracked die with electrical overstress damage. Traditional tools such as simple magnifying lens, optical microscope and up to the advance Scanning Electron Microscope are not enough to study the internal fractures or markings that could lead back to the origin of the crack. In order to study these internal fractures, the analyst tends to break the sample into pieces. However, this method creates additional mechanical stress and leads to a secondary crack where the point of origin will be difficult to analyze. This paper aims to introduce infrared microscopy in fractography (mainly on silicon) using cases and techniques to minimize the occurrence of secondary crack in analyzing internal fractures.


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