scholarly journals Application Of Residue Codes For Error Detection In Mixed Signal Devices

2021 ◽  
Author(s):  
Leila Feyzmohammadi
Keyword(s):  
Error Detection ◽  
Error Control ◽  
Low Cost ◽  
Linear Feedback ◽  
Error Control Codes ◽  
Mixed Signal ◽  
Analog To Digital ◽  
Signal Systems ◽  
Secure Data Transmission ◽  
On Line

Testing methods based on residue codes are considered as simple, with high probability of detecting errors. Most of the literatures on arithmetic error control codes are mainly focused on applications of secure data transmission and testing digital circuits rather than testing mixed-signal systems. In both cases implementation of residue computing circuit (RCC), also known as the residue generator is an integral part of the hardware design. In this work a low-cost compactor circuit to calculate the residue for on-line testing of analog-to-digital converter has been presented. Aliasing rate and its relationship with the resolution of the ADC have been analyzed. Theory and operation of Linear Feedback Shift Registers have been applied for the implementation of the modulo adder circuit. The compaction circuits were simulated, and the result confirmed the theoretical analysis.

scholarly journals Application Of Residue Codes For Error Detection In Mixed Signal Devices

2021 ◽  
Author(s):  
Leila Feyzmohammadi
Keyword(s):  
Error Detection ◽  
Error Control ◽  
Low Cost ◽  
Linear Feedback ◽  
Error Control Codes ◽  
Mixed Signal ◽  
Analog To Digital ◽  
Signal Systems ◽  
Secure Data Transmission ◽  
On Line

Testing methods based on residue codes are considered as simple, with high probability of detecting errors. Most of the literatures on arithmetic error control codes are mainly focused on applications of secure data transmission and testing digital circuits rather than testing mixed-signal systems. In both cases implementation of residue computing circuit (RCC), also known as the residue generator is an integral part of the hardware design. In this work a low-cost compactor circuit to calculate the residue for on-line testing of analog-to-digital converter has been presented. Aliasing rate and its relationship with the resolution of the ADC have been analyzed. Theory and operation of Linear Feedback Shift Registers have been applied for the implementation of the modulo adder circuit. The compaction circuits were simulated, and the result confirmed the theoretical analysis.

Low-cost sound-based localization using programmable mixed-signal systems-on-chip

2011 ◽  
Vol 42 (2) ◽  
pp. 382-395 ◽  
Author(s):  
Anurag Umbarkar ◽  
Varun Subramanian ◽  
Alex Doboli
Keyword(s):  
Low Cost ◽  
Mixed Signal ◽  
Signal Systems ◽  
Systems On Chip ◽  
On Chip

Flexible Unequal Error Control Codes with Selectable Error Detection and Correction Levels

2013 ◽  
pp. 178-189 ◽  
Author(s):  
Luis-J. Saiz-Adalid ◽  
Pedro-J. Gil-Vicente ◽  
Juan-Carlos Ruiz-García ◽  
Daniel Gil-Tomás ◽  
J. -Carlos Baraza ◽  
...  
Keyword(s):  
Error Detection ◽  
Error Control ◽  
Error Control Codes ◽  
Error Detection And Correction

Rapid prototyping of algorithmic A/D converters based on FPAA devices

2013 ◽  
Vol 61 (3) ◽  
pp. 691-696 ◽  
Author(s):  
R. Suszynski ◽  
K. Wawryn
Keyword(s):  
Rapid Prototyping ◽  
Sinusoidal Signal ◽  
Digital Converter ◽  
Mixed Signal ◽  
Analog Digital Converter ◽  
Signal Systems ◽  
Programmable Analog ◽  
Field Programmable ◽  
Field Programmable Analog Array

Abstract A rapid prototyping method for designing mixed signal systems has been presented in the paper. The method is based on implementation of the field programmable analog array (FPAA) to configure and reconfigure mixed signal systems. A serial algorithmic analog digital converter has been used as an example. Three converter architectures have been selected and implemented FPAA device. To verify and illustrate converters operation and prototyping capabilities, implemented converters have been excited by a sinusoidal signal. Analog sinusoidal excitations, digital responses and sinusoidal waveforms after reconstruction are presented.

Arithmetic Compactors Design: Application to Mixed Signal Systems

2012 ◽  
Vol 1 (1) ◽  
pp. 1-7
Author(s):  
Vadim Geurkov ◽  
◽  
Lev Kirischian ◽  
Keyword(s):  
Mixed Signal ◽  
Signal Systems

Setting an error detection infrastructure with low cost acoustic wave detectors

2012 ◽  
Vol 40 (3) ◽  
pp. 333-343 ◽  
Author(s):  
Gaurang Upasani ◽  
Xavier Vera ◽  
Antonio González
Keyword(s):  
Acoustic Wave ◽  
Error Detection ◽  
Low Cost

scholarly journals Immobilization of Pseudomonas aeruginosa static biomass on eggshell powder for on-line preconcentration and determination of Cr (VI)

2020 ◽  
Vol 18 (1) ◽  
pp. 303-313 ◽  
Author(s):  
Aamir Rasheed ◽  
Tahseen Ghous ◽  
Sumaira Mumtaz ◽  
Muhammad Nadeem Zafar ◽  
Kalsoom Akhter ◽  
...  
Keyword(s):  
Pseudomonas Aeruginosa ◽  
Low Cost ◽  
Colorimetric Detection ◽  
Time Flow ◽  
Highly Sensitive ◽  
Glass Column ◽  
On Line ◽  
Preconcentration Time ◽  
Ultra Trace

AbstractIn the present work, a novel continuous flow system (CFS) is developed for the preconcentration and determination of Cr (VI) using Pseudomonas aeruginosa static biomass immobilized onto an effective and low-cost solid support of powdered eggshells. A mini glass column packed with the immobilized biosorbent is incorporated in a CFS for the preconcentration and determination of Cr (VI) from aqueous solutions. The method is based on preconcentration, washing and elution steps followed by colorimetric detection with 1,5-diphenyl carbazide in sulphuric acid. The effects of several variables such as pH, retention time, flow rate, eluent concentration and loaded volume are studied. Under optimal conditions, the CFS method has a linear range between 10 and 100 μg L-1 and a detection limit of 6.25 μg L-1 for the determination of Cr (VI). The sampling frequency is 10 samples per hour with a preconcentration time of 5 mins. Furthermore, after washing with a 0.1 M buffer (pH 3.0), the activity of the biosorbent is regenerated and remained comparable for more than 200 cycles. Scanning electron microscopy reveals a successful immobilization of biomass on eggshells powder and precipitation of Cr (VI) on the bacterial cell surface. The proposed method proves highly sensitive and could be suitable for the determination of Cr (VI) at an ultra-trace level.

The Design and Implementation of ECC High-Speed Encryption Engine Based on FPGA

2012 ◽  
Vol 459 ◽  
pp. 544-548 ◽  
Author(s):  
Wei Liang ◽  
Jian Bo Xu ◽  
Wei Hong Huang ◽  
Li Peng
Keyword(s):  
Data Transmission ◽  
High Speed ◽  
Lower Cost ◽  
Low Cost ◽  
Rapid Development ◽  
Security Technology ◽  
Multiplication Algorithm ◽  
Secure Data Transmission ◽  
And Performance ◽  
Computation Speed

Network security technology ensures secure data transmission in network. Meanwhile, it brings extra overhead of security system in terms of cost and performance, which seriously affects the rapid development of existing high-speed encryption systems. The existing encryption technology cannot meet the demand of high security, low cost and high real-time. For solving above problems, an ECC encryption engine architecture based on scalable public key cipher and a high-speed configurable multiplication algorithm are designed. The algorithm was tested on FPGA platform and the experiment results show that the system has better computation speed and lower cost overhead. By comparing with other systems, our system has benefits in terms of hardware overhead and encryption time ratio

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