scholarly journals Analysis and Design of a Fully-Integrated High-Power Differential CMOS T/R Switch and Power Amplifier Using Multi-Section Impedance Transformation Technique

Electronics ◽  
2021 ◽  
Vol 10 (9) ◽  
pp. 1028
Author(s):  
Hyun-Woong Kim ◽  
Minsik Ahn ◽  
Ockgoo Lee ◽  
Hyoungsoo Kim ◽  
Hyungwook Kim ◽  
...  
Keyword(s):  
Insertion Loss ◽  
High Power ◽  
Cmos Process ◽  
Load Impedance ◽  
Power Differential ◽  
Analysis And Design ◽  
Power Added Efficiency ◽  
Front End ◽  
Power Handling Capability ◽  
Voltage Swing

In this paper, a new topology for a high-power single-pole-double-throw (SPDT) antenna switch is presented, and its loss mechanisms are fully analyzed. The differential architecture is employed in the proposed switch implementation to prevent unwanted channel formations of OFF-state Rx switch transistors by relieving the voltage swing over the Rx switch devices. In addition to that, the load impedance seen by the Tx switch is stepped down to reduce the voltage swing even more, allowing the antenna switch to handle a high-power signal without distortions. To drop the switch operating impedance, two matching networks are required at the input and the output of the Tx switch, respectively, and they are carefully implemented considering the integration issue of the front-end circuitries. From the loss analysis of the whole signal path, an optimum switch operating impedance is decided in view of a trade-off between power handling capability and insertion loss of the antenna switch. The insertion loss of the proposed design is compared to the conventional design with electromagnetic (EM) simulated transformer and inductors. The proposed antenna switch is implemented in a standard 0.18 µm CMOS process, and all switch devices adopt the deep n-well structure. The measured performance of the proposed transmitter front-end chain shows a 1 dB compression point (P1dB) of 32.1 dBm with 38.3% power-added efficiency (PAE) at 1.9 GHz.

High-power monolithic AlGaN/GaN high electron mobility transistor switches

2009 ◽  
Vol 1 (4) ◽  
pp. 339-345 ◽  
Author(s):  
Vincenzo Alleva ◽  
Andrea Bettidi ◽  
Walter Ciccognani ◽  
Marco De Dominicis ◽  
Mauro Ferrari ◽  
...  
Keyword(s):  
Insertion Loss ◽  
High Power ◽  
Integrated Circuit ◽  
State Of The Art ◽  
High Electron Mobility Transistor ◽  
High Electron ◽  
Monolithic Microwave Integrated Circuit ◽  
X Band ◽  
Power Handling Capability ◽  
Better Than

This work presents the design, fabrication, and test of X-band and 2–18 GHz wideband high-power single pole double throw (SPDT) monolithic microwave integrated circuit (MMIC) switches in microstrip gallium nitride (GaN) technology. Such switches have demonstrated state-of-the-art performances and RF fabrication yields better than 65%. In particular, the X-band switch exhibits 1 dB insertion loss, better than 37 dB isolation, and a power handling capability better than 39 dBm at a 1 dB insertion loss compression point; the wideband switch shows an insertion loss lower than 2.2 dB, better than 25 dB isolation, and an insertion loss compression of 1 dB at an input drive higher than 38.5 dBm in the entire bandwidth.

A novel fully integrated transmitter front-end with high power-added efficiency

2005 ◽  
Vol 53 (10) ◽  
pp. 3206-3214 ◽  
Author(s):  
Hyungrak Kim ◽  
Ick-Jae Yoon ◽  
Young Joong Yoon
Keyword(s):  
High Power ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Front End

Wideband Design of the Fully Integrated Transmitter Front-End With High Power-Added Efficiency

2007 ◽  
Vol 55 (5) ◽  
pp. 916-924 ◽  
Author(s):  
Hyungrak Kim ◽  
Young Joong Yoon
Keyword(s):  
High Power ◽  
Fully Integrated ◽  
Power Added Efficiency ◽  
Front End

Fully integrated high power RF front-end circuits in 2 GHz using 0.18um standard CMOS process

2008 ◽  
Author(s):  
Minsik Ahn ◽  
Kyu-Hwan An ◽  
Chang-Ho Lee ◽  
J. Laskar ◽  
Hak-Sun Kim
Keyword(s):  
High Power ◽  
Cmos Process ◽  
Fully Integrated ◽  
Front End ◽  
Rf Front End ◽  
Standard Cmos Process ◽  
Front End Circuits

A 10-Gb/s 0.18-μm CMOS Optical Receiver Front-End Amplifier

2013 ◽  
Vol 760-762 ◽  
pp. 115-119
Author(s):  
Wen Yuan Li ◽  
Rui Guo
Keyword(s):  
Low Voltage ◽  
Low Cost ◽  
Parasitic Capacitance ◽  
Optical Receiver ◽  
Cmos Process ◽  
Chip Area ◽  
Noise Interference ◽  
Limiting Amplifier ◽  
Front End ◽  
Voltage Swing

A fully integrated 10-Gb/s optical receiver analog front-end (AFE) design that includes a transimpedance amplifier (TIA) and a limiting amplifier (LA) is demonstrated to require less chip area and is suitable for both low-cost and low-voltage applications. The AFE is stimulation using a 0.18μm CMOS process. In order to avoid off-chip noise interference, the TIA and LA are dc-coupled on the chip instead of ac-coupled though a large external capacitor. The tiny photo current received by the receiver AFE is amplified to voltage swing of 400. The results indicate that, with a photodiode parasitic capacitance of 500fF and the bonding pad parasitic capacitance of 200fF between which a 2-mm bond wire is inserted at the input node, the AFE provides a conversion gain of up to 89.21 dB and 3 dB bandwidth of 9.78 GHz. Operating under a 1.8V supply, circuit power dissipation is 95 mW and its sensitivity is 18.5μA for BER of 10-12

scholarly journals Analysis and Design of Transformer-Based mm-Wave Transmit/Receive Switches

2012 ◽  
Vol 2012 ◽  
pp. 1-11 ◽  
Author(s):  
Ehsan Adabi ◽  
Ali M. Niknejad
Keyword(s):  
Insertion Loss ◽  
Input Power ◽  
Active Area ◽  
Cmos Process ◽  
Large Signal ◽  
Digital Cmos ◽  
Analysis And Design ◽  
Wave Transformer

Transformer-based shunt single pole, double-throw (SPDT) switches are analyzed, and design equations are provided. A mm-wave transformer-based SPDT shunt switch prototype was designed and fabricated in 90 nm digital CMOS process. It has a minimum insertion loss of 3.4 dB at 50 GHz from the single pole to the ON-thru port and a leakage of 19 dB from the single pole to the OFF-thru port. The isolation is 13.7 dB between the two thru ports. Large signal measurements verify that the switch is capable of handling +14 dBm of input power at its 1 dB compression point. The fabricated SPDT switch has a minute active area size of 60 μm×60 μm.

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