scholarly journals High-Speed Column Driver IC Having Buffer Amplifier with Embedded Isolation Switch and Compact Adaptive Biasing for Flat-Panel Displays

Electronics ◽  
2021 ◽  
Vol 10 (18) ◽  
pp. 2309
Author(s):  
Hyoung-Rae Kim ◽  
Chang-Ho An ◽  
Bai-Sun Kong

A high-speed column driver IC with an area-efficient high-slew-rate buffer amplifier is proposed for use in a large-sized, high-resolution TFT-LCD panel application. In the proposed architecture, explicit isolation switches have been embedded into the buffer amplifier resulting in a fast settling response. The amplifier also has a structure that adjusts the tail current of the input stage using a very compact adaptive biasing. The proposed column driver IC, having the proposed buffer amplifier for driving a 55-inch 4K ultra-high-definition (UHD) TV panel, was fabricated in a 0.18-μm 1.8-V low-voltage, 1.2-μm 9-V medium-voltage, and 1.6-μm 18-V high-voltage CMOS process. The performance evaluation results indicated that 90% and 99.9% falling settling times were improved from 1.947 µs to 0.710 µs (63.5% improvement) and 4.131 µs to 2.406 µs (41.7% improvement), respectively. They also indicated that the layout size of the proposed buffer amplifier was reduced from 5580 μm2 to 4402 μm2 (21.1% reduction).

2011 ◽  
Vol 20 (07) ◽  
pp. 1277-1286 ◽  
Author(s):  
MERIH YILDIZ ◽  
SHAHRAM MINAEI ◽  
EMRE ARSLAN

This work presents a high-slew rate rail-to-rail buffer amplifier, which can be used for flat panel displays. The proposed buffer amplifier is composed of two transconductance amplifiers, two current comparators and a push-pull output stage. Phase compensation technique is also used to improve the phase margin value of the proposed buffer amplifier for different load capacitances. Post-layout simulations of the proposed buffer amplifier are performed using 0.35 μm AMS CMOS process parameters and 3.3 V power supply. The circuit is tested under a 600 pF capacitive load. An average settling time of 0.85 μs under a full voltage swing is obtained, while only 3 μA quiescent current is drawn from the power supply. Monte Carlo analysis is also added to show the process variation effects on the circuit.


2010 ◽  
Vol 108-111 ◽  
pp. 771-776
Author(s):  
Nan Tian Huang ◽  
Xiao Sheng Liu ◽  
Dian Guo Xu

The power line communication (PLC) channel has been a transmission medium that enables to transfer high-speed digital data through the classical electrical wires. Channel characteristics of power lines are very important for communications systems design. In order to get the suitable model for power line communications analysis and improve the PLC communication quality, researchers do lots of study about the PLC channel characterizations based on actual measurement and theoretical analysis. This paper reviews the conclusions of recent studies, summaries the characteristics of PLC channel for medium voltage power lines and low voltage power lines. The further research is also put forward.


1997 ◽  
Vol 471 ◽  
Author(s):  
R. Pethe ◽  
C. Deshpandey ◽  
S. Dixit ◽  
E. Demaray ◽  
D. Meakin ◽  
...  

Large grain poly-Silicon (p-Si) films have been evaluated for high speed TFT for flat panel displays [1,2]. It is expected that with good quality p-Si, “System on Glass” products, in which entire electronic circuitry is incorporated directly onto glass are achievable [3]. This approach therefore has the potential to fabricate Integrated AMLCD's (IAMLCD) and bypass conventional Si wafer based products and integrate CMOS circuits with direct view TFT LCD manufacturing. To realize this potential; it is necessary to develop a production process for depositing repeatable, good quality p-Si films on to large area glass substrates.


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