Low-Cost, Low-Power FPGA Implementation of ED25519 and CURVE25519 Point Multiplication

Twisted Edwards curves have been at the center of attention since their introduction by Bernstein et al. in 2007. The curve ED25519, used for Edwards-curve Digital Signature Algorithm (EdDSA), provides faster digital signatures than existing schemes without sacrificing security. The CURVE25519 is a Montgomery curve that is closely related to ED25519. It provides a simple, constant time, and fast point multiplication, which is used by the key exchange protocol X25519. Software implementations of EdDSA and X25519 are used in many web-based PC and Mobile applications. In this paper, we introduce a low-power, low-area FPGA implementation of the ED25519 and CURVE25519 scalar multiplication that is particularly relevant for Internet of Things (IoT) applications. The efficiency of the arithmetic modulo the prime number 2 255 - 19 , in particular the modular reduction and modular multiplication, are key to the efficiency of both EdDSA and X25519. To reduce the complexity of the hardware implementation, we propose a high-radix interleaved modular multiplication algorithm. One benefit of this architecture is to avoid the use of large-integer multipliers relying on FPGA DSP modules.

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Efficient Lightweight Hardware Structures of Point Multiplication on Binary Edwards Curves for Elliptic Curve Cryptosystems

Journal of Circuits System and Computers ◽

10.1142/s0218126619501494 ◽

2019 ◽

Vol 28 (09) ◽

pp. 1950149

Author(s):

Bahram Rashidi ◽

Mohammad Abedini

Keyword(s):

High Speed ◽

Critical Path ◽

Low Cost ◽

Path Delay ◽

Point Multiplication ◽

Low Area ◽

Elliptic Curve Cryptosystems ◽

Edwards Curves ◽

Special Cases ◽

Field Multiplication

This paper presents efficient lightweight hardware implementations of the complete point multiplication on binary Edwards curves (BECs). The implementations are based on general and special cases of binary Edwards curves. The complete differential addition formulas have the cost of [Formula: see text] and [Formula: see text] for general and special cases of BECs, respectively, where [Formula: see text] and [Formula: see text] denote the costs of a field multiplication, a field squaring and a field multiplication by a constant, respectively. In the general case of BECs, the structure is implemented based on 3 concurrent multipliers. Also in the special case of BECs, two structures by employing 3 and 2 field multipliers are proposed for achieving the highest degree of parallelization and utilization of resources, respectively. The field multipliers are implemented based on the proposed efficient digit–digit polynomial basis multiplier. Two input operands of the multiplier proceed in digit level. This property leads to reduce hardware consumption and critical path delay. Also, in the structure, based on the change of input digit size from low digit size to high digit size the number of clock cycles and input words are different. Therefore, the multiplier can be flexible for different cryptographic considerations such as low-area and high-speed implementations. The point multiplication computation requires field inversion, therefore, we use a low-cost Extended Euclidean Algorithm (EEA) based inversion for implementation of this field operation. Implementation results of the proposed architectures based on Virtex-5 XC5VLX110 FPGA for two fields [Formula: see text] and [Formula: see text] are achieved. The results show improvements in terms of area and efficiency for the proposed structures compared to previous works.

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FPGA Implementation of an ECC Processor Using Edwards Curves and DFT Modular Multiplication

2021 12th International Conference on Information and Communication Systems (ICICS) ◽

10.1109/icics52457.2021.9464611 ◽

2021 ◽

Author(s):

Osama Al-Khaleel ◽

Selcuk Baktir ◽

Alptekin Kupcu

Keyword(s):

Fpga Implementation ◽

Modular Multiplication ◽

Edwards Curves

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Low-Cost and Fast Hardware Implementations of Point Multiplication on Binary Edwards Curves

Electrical Engineering (ICEE), Iranian Conference on ◽

10.1109/icee.2018.8472703 ◽

2018 ◽

Cited By ~ 2

Author(s):

Bahram Rashidi

Keyword(s):

Low Cost ◽

Point Multiplication ◽

Edwards Curves ◽

Hardware Implementations

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The Order of Edwards and Montgomery Curves

WSEAS TRANSACTIONS ON MATHEMATICS ◽

10.37394/23206.2020.19.25 ◽

2020 ◽

Vol 19 ◽

Keyword(s):

Finite Field ◽

Elliptic Curve ◽

Elliptic Curves ◽

Digital Signature ◽

Discrete Logarithm ◽

Log P ◽

Edwards Curves ◽

Digital Signature Algorithm ◽

Supersingular Curves ◽

Edwards Curve

The Elliptic Curve Digital Signature Algorithm (ECDSA) is the elliptic curve analogue of the Digital Signature Algorithm (DSA) [2]. It is well known that the problem of discrete logarithm is NP-hard on group on elliptic curve (EC) [5]. The orders of groups of an algebraic affine and projective curves of Edwards [3, 9] over the finite field Fpn is studied by us. We research Edwards algebraic curves over a finite field, which are one of the most promising supports of sets of points which are used for fast group operations [1]. We construct a new method for counting the order of an Edwards curve [F ] d p E over a finite field Fp . It should be noted that this method can be applied to the order of elliptic curves due to the birational equivalence between elliptic curves and Edwards curves. The method we have proposed has much less complexity 22 O p log p at not large values p in comparison with the best Schoof basic algorithm with complexity 8 2 O(log pn ) , as well as a variant of the Schoof algorithm that uses fast arithmetic, which has complexity 42O(log pn ) , but works only for Elkis or Atkin primes. We not only find a specific set of coefficients with corresponding field characteristics for which these curves are supersingular, but we additionally find a general formula by which one can determine whether a curve [F ] d p E is supersingular over this field or not. The symmetric of the Edwards curve form and the parity of all degrees made it possible to represent the shape curves and apply the method of calculating the residual coincidences. A birational isomorphism between the Montgomery curve and the Edwards curve is also constructed. A oneto- one correspondence between the Edwards supersingular curves and Montgomery supersingular curves is established. The criterion of supersingularity for Edwards curves is found over F pn .

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Design and Implementation of High-Performance ECC Processor with Unified Point Addition on Twisted Edwards Curve

Sensors ◽

10.3390/s20185148 ◽

2020 ◽

Vol 20 (18) ◽

pp. 5148

Author(s):

Md. Mainul Islam ◽

Md. Selim Hossain ◽

Moh. Khalid Hasan ◽

Md. Shahjalal ◽

Yeong Min Jang

Keyword(s):

Elliptic Curve ◽

High Speed ◽

High Performance ◽

Security Level ◽

Prime Field ◽

Iot Security ◽

Point Multiplication ◽

Low Area ◽

Edwards Curve ◽

Twisted Edwards Curve

With the swift evolution of wireless technologies, the demand for the Internet of Things (IoT) security is rising immensely. Elliptic curve cryptography (ECC) provides an attractive solution to fulfill this demand. In recent years, Edwards curves have gained widespread acceptance in digital signatures and ECC due to their faster group operations and higher resistance against side-channel attacks (SCAs) than that of the Weierstrass form of elliptic curves. In this paper, we propose a high-speed, low-area, simple power analysis (SPA)-resistant field-programmable gate array (FPGA) implementation of ECC processor with unified point addition on a twisted Edwards curve, namely Edwards25519. Efficient hardware architectures for modular multiplication, modular inversion, unified point addition, and elliptic curve point multiplication (ECPM) are proposed. To reduce the computational complexity of ECPM, the ECPM scheme is designed in projective coordinates instead of affine coordinates. The proposed ECC processor performs 256-bit point multiplication over a prime field in 198,715 clock cycles and takes 1.9 ms with a throughput of 134.5 kbps, occupying only 6543 slices on Xilinx Virtex-7 FPGA platform. It supports high-speed public-key generation using fewer hardware resources without compromising the security level, which is a challenging requirement for IoT security.

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