scholarly journals A Highly Linear CMOS Image Sensor Design Based on an Adaptive Nonlinear Ramp Generator and Fully Differential Pipeline Sampling Quantization with a Double Auto-Zeroing Technique

Sensors ◽  
2020 ◽  
Vol 20 (4) ◽  
pp. 1046
Author(s):  
Chuangze Li ◽  
Benguang Han ◽  
Jie He ◽  
Zhongjie Guo ◽  
Longsheng Wu
Keyword(s):  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Frame Rate ◽  
Oxide Semiconductor ◽  
Ramp Generator ◽  
Fully Differential ◽  
Generator Circuit ◽  
Pattern Noise ◽  
Fixed Pattern Noise

For a complementary metal-oxide-semiconductor image sensor with highly linear, low noise and high frame rate, the nonlinear correction and frame rate improvement techniques are becoming very important. The in-pixel source follower transistor and the integration capacitor on the floating diffusion node cause linearity degradation. In order to address this problem, this paper proposes an adaptive nonlinear ramp generator circuit based on dummy pixels used in single-slope analog-to-digital converter topology for a complementary metal-oxide-semiconductor (CMOS) image sensor. In the proposed approach, the traditional linear ramp generator circuit is replaced with the new proposed adaptive nonlinear ramp generator circuit that can mitigate the nonlinearity of the pixel unit circuit, especially the gain nonlinearity of the source follower transistor and the integration capacitor nonlinearity of the floating diffusion node. Moreover, in order to enhance the frame rate and address the issue of high column fixed pattern noise, a new readout scheme of fully differential pipeline sampling quantization with a double auto-zeroing technique is proposed. Compared with the conventional readout structure without a fully differential pipeline sampling quantization technique and double auto-zeroing technique, the proposed readout scheme cannot only enhance the frame rate but can also improve the consistency of the offset and delay information of different column comparators and significantly reduce the column fixed pattern noise. The proposed techniques are simulated and verified with a prototype chip fabricated using typical 180 nm CMOS process technology. The obtained measurement results demonstrate that the overall nonlinearity of the CMOS image sensor is reduced from 1.03% to 0.047%, the efficiency of the comparator is improved from 85.3% to 100%, and the column fixed pattern noise is reduced from 0.43% to 0.019%.

scholarly journals Over 100 Million Frames per Second 368 Frames Global Shutter Burst CMOS Image Sensor with Pixel-wise Trench Capacitor Memory Array

Sensors ◽  
2020 ◽  
Vol 20 (4) ◽  
pp. 1086 ◽  
Author(s):  
Manabu Suzuki ◽  
Yuki Sugama ◽  
Rihito Kuroda ◽  
Shigetoshi Sugawa
Keyword(s):  
High Speed ◽  
Cooling System ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Frame Rate ◽  
Oxide Semiconductor ◽  
Photoelectric Conversion ◽  
Memory Array ◽  
Record Length

In this paper, a prototype ultra-high speed global shutter complementary metal-oxide-semiconductor (CMOS) image sensor with pixel-wise trench capacitor memory array achieving over 100 million frames per second (fps) with up to 368 record length by burst correlated double sampling (CDS) operation is presented. Over 100 Mfps high frame rate is obtained by reduction of pixel output load by the pixel-wise memory array architecture and introduction of the burst CDS operation which minimizes the pixel driving pulse transitions. Long record length is realized by high density analog memory integration with Si trench capacitors. A maximum 125 Mfps frame rate with up to 368 record length video capturing was confirmed under room temperature without any cooling system. The photoelectric conversion characteristics of the burst CDS operation were measured and compared with those of the conventional CDS operation.

scholarly journals Low-Cost 2D Index and Straightness Measurement System Based on a CMOS Image Sensor

Sensors ◽  
2019 ◽  
Vol 19 (24) ◽  
pp. 5461 ◽  
Author(s):  
Alain Küng ◽  
Benjamin A. Bircher ◽  
Felix Meli
Keyword(s):  
Measurement System ◽  
Degrees Of Freedom ◽  
Low Cost ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Oxide Semiconductor ◽  
Measurement Systems ◽  
Starting Point ◽  
Sensor Properties

Accurate traceable measurement systems often use laser interferometers for position measurements in one or more dimensions. Since interferometers provide only incremental information, they are often combined with index sensors to provide a stable reference starting point. Straightness measurements are important for machine axis correction and for systems having several degrees of freedom. In this paper, we investigate the accuracy of an optical two-dimensional (2D) index sensor, which can also be used in a straightness measurement system, based on a fiber-coupled, collimated laser beam pointing onto an image sensor. Additionally, the sensor can directly determine a 2D position over a range of a few millimeters. The device is based on a simple and low-cost complementary metal–oxide–semiconductor (CMOS) image sensor chip and provides sub-micrometer accuracy. The system is an interesting alternative to standard techniques and can even be implemented on machines for real-time corrections. This paper presents the developed sensor properties for various applications and introduces a novel error separation method for straightness measurements.

scholarly journals Design of an Edge-Detection CMOS Image Sensor with Built-in Mask Circuits

Sensors ◽  
2020 ◽  
Vol 20 (13) ◽  
pp. 3649
Author(s):  
Minhyun Jin ◽  
Hyeonseob Noh ◽  
Minkyu Song ◽  
Soo Youn Kim
Keyword(s):  
Power Consumption ◽  
Edge Detection ◽  
Low Power ◽  
High Speed ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Frame Rate ◽  
Oxide Semiconductor ◽  
Total Power ◽  
Total Power Consumption

In this paper, we propose a complementary metal-oxide-semiconductor (CMOS) image sensor (CIS) that has built-in mask circuits to selectively capture either edge-detection images or normal 8-bit images for low-power computer vision applications. To detect the edges of images in the CIS, neighboring column data are compared in in-column memories after column-parallel analog-to-digital conversion with the proposed mask. The proposed built-in mask circuits are implemented in the CIS without a complex image signal processer to obtain edge images with high speed and low power consumption. According to the measurement results, edge images were successfully obtained with a maximum frame rate of 60 fps. A prototype sensor with 1920 × 1440 resolution was fabricated with a 90-nm 1-poly 5-metal CIS process. The area of the 4-shared 4T-active pixel sensor was 1.4 × 1.4 µm2, and the chip size was 5.15 × 5.15 mm2. The total power consumption was 9.4 mW at 60 fps with supply voltages of 3.3 V (analog), 2.8 V (pixel), and 1.2 V (digital).

scholarly journals Analysis of Disparity Information for Depth Extraction Using CMOS Image Sensor with Offset Pixel Aperture Technique

Sensors ◽  
2019 ◽  
Vol 19 (3) ◽  
pp. 472 ◽  
Author(s):  
Byoung-Soo Choi ◽  
Jimin Lee ◽  
Sang-Hwan Kim ◽  
Seunghyuk Chang ◽  
JongHo Park ◽  
...  
Keyword(s):  
Geometric Model ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Image Sensor ◽  
Color Pattern ◽  
Image Sensor ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Color Information ◽  
Depth Extraction ◽  
Measurement Results

A complementary metal oxide semiconductor (CMOS) image sensor (CIS), using offset pixel aperture (OPA) technique, was designed and fabricated using the 0.11-µm CIS process. In conventional cameras, an aperture is located on the camera lens. However, in a CIS camera using OPA technique, apertures are integrated as left-offset pixel apertures (LOPAs) and right-offset pixel apertures (ROPAs). A color pattern is built, comprising LOPA, blue, red, green, and ROPA pixels. The disparity information can be acquired from the LOPA and ROPA channels. Both disparity information and two-dimensional (2D) color information can be simultaneously acquired from the LOPA, blue, red, green, and ROPA channels. A geometric model of the OPA technique is constructed to estimate the disparity of the image, and the measurement results are compared with the estimated results. Depth extraction is thus achieved by a single CIS using the OPA technique, which can be easily adapted to commercial CIS cameras.

scholarly journals A Fixed-Pattern Noise Correction Method Based on Gray Value Compensation for TDI CMOS Image Sensor

Sensors ◽  
2015 ◽  
Vol 15 (9) ◽  
pp. 23496-23513 ◽  
Author(s):  
Zhenwang Liu ◽  
Jiangtao Xu ◽  
Xinlei Wang ◽  
Kaiming Nie ◽  
Weimin Jin
Keyword(s):  
Cmos Image Sensor ◽  
Correction Method ◽  
Image Sensor ◽  
Pattern Noise ◽  
Fixed Pattern Noise ◽  
Noise Correction

scholarly journals Compensation for Process and Temperature Dependency in a CMOS Image Sensor

Sensors ◽  
2019 ◽  
Vol 19 (4) ◽  
pp. 870 ◽  
Author(s):  
Shuang Xie ◽  
Albert Theuwissen
Keyword(s):  
Complementary Metal Oxide Semiconductor ◽  
Process Variations ◽  
Cmos Image Sensor ◽  
Image Sensor ◽  
Temperature Sensors ◽  
Oxide Semiconductor ◽  
Temperature Dependency ◽  
Image Pixels ◽  
On Chip ◽  
Dark Signal

This paper analyzes and compensates for process and temperature dependency among a (Complementary Metal Oxide Semiconductor) CMOS image sensor (CIS) array. Both the analysis and compensation are supported with experimental results on the CIS’s dark current, dark signal non-uniformity (DSNU), and conversion gain (CG). To model and to compensate for process variations, process sensors based on pixel source follower (SF)’s transconductance gm,SF have been proposed to model and to be compared against the measurement results of SF gain ASF. In addition, ASF’s thermal dependency has been analyzed in detail. To provide thermal information required for temperature compensation, six scattered bipolar junction transistor (BJT)-based temperature sensors replace six image pixels inside the array. They are measured to have an untrimmed inaccuracy within ±0.5 ⁰C. Dark signal and CG’s thermal dependencies are compensated using the on-chip temperature sensors by at least 79% and 87%, respectively.

Sign in / Sign up

Export Citation Format

Share Document