scholarly journals Enabling Fine Sample Rate Settings in DSOs with Time-Interleaved ADCs

Sensors ◽  
2021 ◽  
Vol 22 (1) ◽  
pp. 234
Author(s):  
Mauro D’Arco ◽  
Ettore Napoli ◽  
Efstratios Zacharelos ◽  
Leopoldo Angrisani ◽  
Antonio Giuseppe Maria Strollo

The time-base used by digital storage oscilloscopes allows limited selections of the sample rate, namely constrained to a few integer submultiples of the maximum sample rate. This limitation offers the advantage of simplifying the data transfer from the analog-to-digital converter to the acquisition memory, and of assuring stability performances, expressed in terms of absolute jitter, that are independent of the chosen sample rate. On the counterpart, it prevents an optimal usage of the memory resources of the oscilloscope and compels to post processing operations in several applications. A time-base that allows selecting the sample rate with very fine frequency resolution, in particular as a rational submultiple of the maximum rate, is proposed. The proposal addresses the oscilloscopes with time-interleaved converters, that require a dedicated and multifaceted approach with respect to architectures where a single monolithic converter is in charge of signal digitization. The proposed time-base allows selecting with fine frequency resolution sample rate values up to 200 GHz and beyond, still assuring jitter performances independent of the sample rate selection.

2021 ◽  
Vol 24 (4) ◽  
pp. 11-17
Author(s):  
Francesco Bonavolonta ◽  
Mauro D'Arco ◽  
Egidio De Benedetto ◽  
Dominique Dallet ◽  
Annarita Tedesco

2021 ◽  
Vol 32 (3) ◽  
Author(s):  
Ruo-Shi Dong ◽  
Lei Zhao ◽  
Jia-Jun Qin ◽  
Wen-Tao Zhong ◽  
Yi-Chun Fan ◽  
...  

2019 ◽  
Vol 28 (06) ◽  
pp. 1950090
Author(s):  
Jian Luo ◽  
Jing Li ◽  
Shuangyi Wu ◽  
Ning Ning ◽  
Yang Liu

In time-interleaved (TI) analog-to-digital converters (ADCs), bandwidth mismatches, caused by the limited bandwidth of input signal traces and sample circuits, seriously deteriorate the spurious-free dynamic range (SFDR) of the system. This paper analyzes the influence of bandwidth mismatch errors under different sampling sequences. Eventually, based on a randomization technique and the simulated annealing algorithm (SAA), a bandwidth mismatch optimization technique is presented that can work well with other bandwidth mismatch calibration methods. The behavior simulation results indicate that an improvement of 7[Formula: see text]dB in the SFDR can be achieved with this technique in a 16-channel TI-ADC after timing and gain calibration.


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