Reduction in contact resistivity of Ag thick-film conductor on SiN x -coated Si wafer for solar cell using lead tellurite glass frit

2020 ◽  
Vol 59 (9) ◽  
pp. 090908
Author(s):  
Yusuke Tachibana ◽  
Akifumi Matsuda ◽  
Mamoru Yoshimoto
1995 ◽  
Vol 378 ◽  
Author(s):  
Subhash M. Joshi ◽  
Ylrich M. GÖsele ◽  
Teh Y. Tan

AbstractGettering is widely used for fabricating integrated circuits using Si substrates, and has great potential for solar cell fabrications as well. Recently available solar cell efficiency studies have shown the benefits of the wafer backside Al, attributable to effects of gettering, a wafer backside field, and passivation of grain boundaries and dislocations. In this paper, we report experimental results which showed unambiguously that Czochralski Si wafer bulk minority carrier diffusion lengths can be significantly improved due to gettering of impurities by wafer backside Al, which also provided a protection from environmental contamination.


2011 ◽  
Vol 20 (3) ◽  
pp. 225-232 ◽  
Author(s):  
Kwang-Mook Park ◽  
Jee-Hee Jung ◽  
So-Ik Bae ◽  
Si-Young Choi ◽  
Myoung-Bok Lee

2010 ◽  
Vol 2010 (1) ◽  
pp. 000752-000759
Author(s):  
Xudong Chen ◽  
W. Kinzy Jones

Glass frit is a major component of thick film resistor (TFR) for the production of hybrid circuits. More than thirty commercial lead-free glass frits with different compositions have been evaluated for developing a lead-free thick film resistor that is compatible with typical industry thick film processing and has comparable electrical properties as the lead bearing counterpart. Two glass compositions were selected out of 33 candidates for preparation of RuO2 based TFR inks, which were screen printed on alumina substrates and fired at 850°C. The preliminary results of these resistors showed that the sheet resistance spanned from 400 ohms per square (Ω/□) to 0.4 mega-ohms per square (MΩ/□) with 5–15% RuO2 and the hot temperature coefficient of resistance (HTCR) fell in a range of ±350ppm/°C.


2015 ◽  
Vol 2015 (1) ◽  
pp. 000425-000429 ◽  
Author(s):  
Richard C. Garcia

Thick film technology is based on a paste containing glass frit that is screen printed and fused at high temperature onto various ceramic substrate materials. Softening or melting this glassy frit forms a cohesive layer, binding the conductors, resistors or dielectric materials to the ceramic. The dynamics of the printing process and inherent number of associated variables negatively impact the uniformity of the fired surface on a micro scale, which can lead to variation in the wire bonding process. Other processes associated with thick film substrate fabrication can cause problems as well. Laser trimming is used to adjust the value of printed resistors to meet design requirements. This ablation of printed resistors by high–powered pulse laser leaves a halo of debris and contamination on the ceramic substrate, which can cause wire bond lifting. In this paper, we will demonstrate a way to eliminate these problems using a bonding technique called Stand- Off Stitch bonding (SOS). This wire bond type is formed by first placing a ball bump at the second bond, or stitch, location on the thick film substrate, and then forming a normal wire that terminates on that bump. This places two ball bumps at each end of the wire, similar to a security bond. However, the ball bump is located under the stitch instead of on top. This SOS wire bond technique is compliant with the MIL-STD- 883 for a compound bond, where one bond is placed on top of another bond. With the gold bump placed on top of the gold thick film pad, the bump acts as a foundation for the stitch bond, providing a wider contact area and clean bond surface to secure a reliable stitch bond interconnect. With this change, an abrupt improvement to the resultant destruct wire pull tests can be achieved, promoting a robust, controlled process for wire bond interconnects.


Materials ◽  
2019 ◽  
Vol 12 (20) ◽  
pp. 3388 ◽  
Author(s):  
Guang Wu ◽  
Yuan Liu ◽  
Mengxue Liu ◽  
Yi Zhang ◽  
Peng Zhu ◽  
...  

Firing-through paste used for rear-side metallization of p-type monocrystalline silicon passivated emitter and rear contact (PERC) solar cells was developed. The rear-side passivation Al2O3 layer and the SiNx layer can be effectively etched by the firing-through paste. Ohmic contact with a contact resistivity between 1 to 10 mΩ·cm2 was successfully fabricated. Aggressive reactive firing-through paste would introduce non-uniform etching and high-density recombination centers at the Si/paste interface. Good balance between low resistive contact formation and relatively high open-circuit voltage can be achieved by adjusting glass frit and metal powder content in the paste. Patterned dot back contacts formed by firing-through paste can further decrease recombination density at the Si/paste interface. A P-type solar cell with an area of 7.8 × 7.8 cm2 with a Voc of 653.4 mV and an efficiency of 19.61% was fabricated.


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