scholarly journals Digital model of a pseudo-random number generator based on a continuous chaotic system

Informatics ◽  
2021 ◽  
Vol 17 (4) ◽  
pp. 36-47
Author(s):  
Y. A. Drybin ◽  
S. V. Sadau ◽  
V. S. Sadau

It is shown that the choice of the time sampling parameter of the digital model of a continuous dynamic system with chaotic modes based on its dynamics makes it possible to control the characteristics of the output sequence, including avoiding short cycles and periodic behavior modes. On the example of the Lorentz system, the analysis of the law of motion of a chaotic system, linearized in the vicinity of points of stable and unstable equilibrium, is carried out, on the basis of which the parameters of the mathematical model of the generator of pseudo-random numbers are selected. The output sequence of numbers generated in proposed way is subjected to statistical and correlation analysis. Based on the results of the tests carried out, we can say that the obtained pseudo-random sequences based on continuous chaotic systems have statistically random properties and can be used in steganographic and cryptographic systems.

Author(s):  
Roman Senkerik ◽  
Michal Pluhacek ◽  
Zuzana Kominkova Oplatkova

This research deals with the initial investigations on the concept of a chaos-driven evolutionary algorithm Differential evolution. This paper is aimed at the embedding of simple two-dimensional chaotic system, which is Lozi map, in the form of chaos pseudo random number generator for Differential Evolution. The chaotic system of interest is the discrete dissipative system. Repeated simulations were performed on standard benchmark Schwefel’s test function in higher dimensions. Finally, the obtained results are compared with canonical Differential Evolution.


2005 ◽  
Vol 72 (1) ◽  
Author(s):  
Massimo Falcioni ◽  
Luigi Palatella ◽  
Simone Pigolotti ◽  
Angelo Vulpiani

Author(s):  
Mangal Deep Gupta ◽  
R. K. Chauhan

This paper introduces an FPGA implementation of a pseudo-random number generator (PRNG) using Chen’s chaotic system. This paper mainly focuses on the development of an efficient VLSI architecture of PRNG in terms of bit rate, area resources, latency, maximum length sequence, and randomness. First, we analyze the dynamic behavior of the chaotic trajectories of Chen’s system and set the parameter’s value to maintain low hardware design complexity. A circuit realization of the proposed PRNG is presented using hardwired shifting, additions, subtractions, and multiplexing schemes. The benefit of this architecture, all the binary multiplications (except [Formula: see text] and [Formula: see text] operations are performed using hardwired shifting. Moreover, the generated sequences pass all the 15 statistical tests of NIST, while it generates pseudo-random numbers at a uniform clock rate with minimum hardware complexity. The proposed architecture of PRNG is realized using Verilog HDL, prototyped on the Virtex-5 FPGA (XC5VLX50T) device, and its analysis has been done using the Matlab tool. Performance analysis confirms that the proposed Chen chaotic attractor-based PRNG scheme is simple, secure, and hardware efficient, with high potential to be adopted in cryptography applications.


2013 ◽  
Vol 16 (2) ◽  
pp. 210-216 ◽  
Author(s):  
Sattar B. Sadkhan ◽  
◽  
Sawsan K. Thamer ◽  
Najwan A. Hassan ◽  
◽  
...  

Cryptography ◽  
2021 ◽  
Vol 5 (1) ◽  
pp. 8
Author(s):  
Bertrand Cambou ◽  
Donald Telesca ◽  
Sareh Assiri ◽  
Michael Garrett ◽  
Saloni Jain ◽  
...  

Schemes generating cryptographic keys from arrays of pre-formed Resistive Random Access (ReRAM) cells, called memristors, can also be used for the design of fast true random number generators (TRNG’s) of exceptional quality, while consuming low levels of electric power. Natural randomness is formed in the large stochastic cell-to-cell variations in resistance values at low injected currents in the pre-formed range. The proposed TRNG scheme can be designed with three interconnected blocks: (i) a pseudo-random number generator that acts as an extended output function to generate a stream of addresses pointing randomly at the array of ReRAM cells; (ii) a method to read the resistance values of these cells with a low injected current, and to convert the values into a stream of random bits; and, if needed, (iii) a method to further enhance the randomness of this stream such as mathematical, Boolean, and cryptographic algorithms. The natural stochastic properties of the ReRAM cells in the pre-forming range, at low currents, have been analyzed and demonstrated by measuring a statistically significant number of cells. Various implementations of the TRNGs with ReRAM arrays are presented in this paper.


Micromachines ◽  
2020 ◽  
Vol 12 (1) ◽  
pp. 31
Author(s):  
Junxiu Liu ◽  
Zhewei Liang ◽  
Yuling Luo ◽  
Lvchen Cao ◽  
Shunsheng Zhang ◽  
...  

Recent research showed that the chaotic maps are considered as alternative methods for generating pseudo-random numbers, and various approaches have been proposed for the corresponding hardware implementations. In this work, an efficient hardware pseudo-random number generator (PRNG) is proposed, where the one-dimensional logistic map is optimised by using the perturbation operation which effectively reduces the degradation of digital chaos. By employing stochastic computing, a hardware PRNG is designed with relatively low hardware utilisation. The proposed hardware PRNG is implemented by using a Field Programmable Gate Array device. Results show that the chaotic map achieves good security performance by using the perturbation operations and the generated pseudo-random numbers pass the TestU01 test and the NIST SP 800-22 test. Most importantly, it also saves 89% of hardware resources compared to conventional approaches.


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