Electrical Properties of Si-doped ZnO-based Thin-film Transistor with Dual-active-layer Structure

2015 ◽  
Vol 36 (2) ◽  
pp. 213-218
Author(s):  
莫淑芬 MO Shu-fen ◽  
刘玉荣 LIU Yu-rong ◽  
刘远 LIU Yuan
Keyword(s):  
Thin Film ◽  
Electrical Properties ◽  
Active Layer ◽  
Layer Structure ◽  
Thin Film Transistor ◽  
Si Doped ◽  
Doped Zno

scholarly journals Investigation of the Electrical Properties of Double-Gate Dual-Active-Layer (DG-DAL) Thin-Film Transistor (TFT) with HfO-=SUB=-2-=/SUB=-/La-=SUB=-2-=/SUB=-O-=SUB=-3-=/SUB=-/HfO-=SUB=-2-=/SUB=- (HLH) Sandwich Gate Dielectrics

2020 ◽  
Vol 54 (10) ◽  
pp. 1098
Author(s):  
L. Ramesh ◽  
S. Moparthi ◽  
P.K. Tiwari ◽  
V.R. Samoju ◽  
G.K. Saramekala
Keyword(s):  
Thin Film ◽  
Electrical Properties ◽  
Active Layer ◽  
Threshold Voltage ◽  
Thin Film Transistor ◽  
Hafnium Dioxide ◽  
Subthreshold Swing ◽  
Oxide Material ◽  
Double Gate ◽  
Pixel Intensity

In this paper, the electrical properties of a double-gate dual-active-layer (DG-DAL) thin-film transistor (TFT) is investigated. To increase the ON-current and pixel intensity, and control the voltage stress bias, the conventional gate oxide material (silicon dioxide SiO2) is replaced with a tri-high-k gate dielectric layer, hafnium dioxide HfO2/lanthanum oxide La2O3/hafnium dioxide HfO2 (HLH). Further, the performance of the proposed DG-DAL structure is compared with the single-active-layer (SAL) and dual-active-layer (DAL) TFTs. The amorphous indium-gallium zinc-oxide (a-IGZO) is considered as active layer for SAL channel region, and on the other hand, a-IGZO and indium-tin-oxide (ITO) are considered as active layers for DAL TFT and DG-DAL TFT channel regions. The parameters such as OFF-current, ON-current, ION/IOFF ratio, threshold voltage, mobility, average subthreshold swing, etc. are evaluated for the considered structures. It is observed that the DG-DAL TFT with HLH dielectric offers high ON-current of 3.85·10-3 A/μm, very low OFF-current of 2.53·10-17 A/μm, very high ION/IOFF ratio of 1.51·1014, the threshold voltage of 0.642 V, high mobility of 35 cm2·v-1·s-1 and average subthreshold swing of 127.84 mV/dec. A commercial TCAD simulation tool ATLAS from SilvacoTM is used to investigate all the parameters for considered structures. Keywords: single active layer (SAL), dual active layer (DAL), double-gate dual active layer (DG-DAL), InGaZnO (IGZO), InSnO (ITO), thin-film transistor (TFT), HfO2/La2O3/HfO2 (HLH).

scholarly journals Back-channel Etched In-Ga-Zn-O Thin-film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain

2021 ◽  
Author(s):  
Rauf Khan ◽  
Muhamad Affiq Bin Misran ◽  
Reiji Hattori
Keyword(s):  
Thin Film ◽  
Electrical Properties ◽  
Active Layer ◽  
Threshold Voltage ◽  
Thermal Evaporation ◽  
Thin Film Transistor ◽  
Wet Etching ◽  
Electrical Performance ◽  
Saturation Region ◽  
Photolithography Process

The electrical performance of the back-channel etched Indium–Gallium–Zinc–Oxide (IGZO) thin-film transistors (TFTs) with copper (Cu) source and drain (S/D) which are patterned by a selective etchant was investigated. The Cu S/D were fabricated on molybdenum (Mo) layer to prevent the Cu diffusion to the active layer (IGZO). We deposited the Cu layer using thermal evaporation and performed the selective wet etching of Cu using non-acidic special etchant without damaging the IGZO active layer. We fabricated the IGZO TFTs and compare the performance in terms of linear and saturation region mobility, threshold voltage and ON current (ION). The IGZO TFTs with Mo/Cu S/D exhibits good electrical properties as the linear region mobility is 12.3 cm2/V-s, saturation region mobility is 11 cm2/V-s, threshold voltage is 1.2 V and ION is 3.16 x 10-6 A. We patterned all the layers by photolithography process. Finally, we introduced SiO2-ESL layer to protect the device from the external influence. The results show that the prevention of Cu and introduced ESL layer enhances the electrical properties of IGZO TFTs.

Investigation of atomic-layer-deposited Al-doped ZnO film for AZO/ZnO double-stacked active layer thin-film transistor application

2017 ◽  
Vol 638 ◽  
pp. 89-95 ◽  
Author(s):  
Jun-Kyo Jeong ◽  
Ho-Jin Yun ◽  
Seung-Dong Yang ◽  
Ki-Yun Eom ◽  
Seong-Won Chea ◽  
...  
Keyword(s):  
Thin Film ◽  
Active Layer ◽  
Thin Film Transistor ◽  
Atomic Layer ◽  
Zno Film ◽  
Doped Zno ◽  
Layer Thin Film

scholarly journals Back-Channel Etched In-Ga-Zn-O Thin-Film Transistor Utilizing Selective Wet-Etching of Copper Source and Drain

Processes ◽  
2021 ◽  
Vol 9 (12) ◽  
pp. 2193
Author(s):  
Rauf Khan ◽  
Muhamad Affiq Bin Misran ◽  
Michitaka Ohtaki ◽  
Jun Tae Song ◽  
Tatsumi Ishihara ◽  
...  
Keyword(s):  
Thin Film ◽  
Electrical Properties ◽  
Active Layer ◽  
Threshold Voltage ◽  
Thin Film Transistor ◽  
Wet Etching ◽  
Electrical Performance ◽  
Indium Gallium Zinc Oxide ◽  
Saturation Region ◽  
Photolithography Process

The electrical performance of the back-channel etched Indium–Gallium–Zinc–Oxide (IGZO) thin-film transistors (TFTs) with copper (Cu) source and drain (S/D) which are patterned by a selective etchant was investigated. The Cu S/D were fabricated on a molybdenum (Mo) layer to prevent the Cu diffusion to the active layer (IGZO). We deposited the Cu layer using thermal evaporation and performed the selective wet etching of Cu using a non-acidic special etchant without damaging the IGZO active layer. We fabricated the IGZO TFTs and compared the performance in terms of linear and saturation region mobility, threshold voltage and ON current (ION). The IGZO TFTs with Mo/Cu S/D exhibit good electrical properties, as the linear region mobility is 12.3 cm2/V-s, saturation region mobility is 11 cm2/V-s, threshold voltage is 1.2 V and ION is 3.16 × 10−6 A. We patterned all the layers by a photolithography process. Finally, we introduced a SiO2-ESL layer to protect the device from external influence. The results show that the prevention of Cu and the introduced ESL layer enhances the electrical properties of IGZO TFTs.

scholarly journals Preparation and Electrical Properties of Modulation-doped ZnO Multi-layer Structure

2003 ◽  
Vol 50 (4) ◽  
pp. 292-296
Author(s):  
Yutaka Adachi ◽  
Naoki Ohashi ◽  
Isao Sakaguchi ◽  
Hajime Haneda ◽  
Haruki Ryouken ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Layer Structure ◽  
Doped Zno
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