Machine Vision-Aided Quality Decision System for Solder Joint Defect Evaluation

2012 ◽  
Vol 268-270 ◽  
pp. 1393-1397
Author(s):  
Chien Chih Wang
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Inspection System ◽  
Defect Classification ◽  
Decision System ◽  
Printed Circuit ◽  
Pcb Manufacturing ◽  
Joint Quality ◽  
Quality Decision

To improve the printed circuit board (PCB) manufacturing process, it is important to have an automatic inspection system that classifies information regarding defects in solder joints. This paper proposes a quality decision system for solder joint defect classification on a PCB. An experiment was conducted to demonstrate the application of the system. The results showed that the inspection accuracy reached 94%, which is superior to the results achieved by other methods. The results of this study provide an effective solution for the inspection of the solder joint quality.

Materials Characterization of Lead Free Compositions for Minimum Temperature SMT Processes at the SLI-Second Level Interconnect Solder Joint

2004 ◽  
Author(s):  
Norman J. Armendariz ◽  
Prawin Paulraj
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Gold Surface ◽  
Circuit Board ◽  
Lead Free ◽  
Processing Temperature ◽  
The European Union ◽  
Printed Circuit ◽  
Higher Temperature ◽  
Tin Silver Copper

Abstract The European Union is banning the use of Pb in electronic products starting July 1st, 2006. Printed circuit board assemblies or “motherboards” require that planned CPU sockets and BGA chipsets use lead-free solder ball compositions at the second level interconnections (SLI) to attach to a printed circuit board (PCB) and survive various assembly and reliability test conditions for end-use deployment. Intel is pro-actively preparing for this anticipated Pb ban, by evaluating a new lead free (LF) solder alloy in the ternary Tin- Silver-Copper (Sn4.0Ag0.5Cu) system and developing higher temperature board assembly processes. This will be pursued with a focus on achieving the lowest process temperature required to avoid deleterious higher temperature effects and still achieve a metallurgically compatible solder joint. One primary factor is the elevated peak reflow temperature required for surface mount technology (SMT) LF assembly, which is approximately 250 °C compared to present eutectic tin/lead (Sn37Pb) reflow temperatures of around 220 °C. In addition, extended SMT time-above-liquidus (TAL) and subsequent cooling rates are also a concern not only for the critical BGA chipsets and CPU BGA sockets but to other components similarly attached to the same PCB substrate. PCBs used were conventional FR-4 substrates with organic solder preservative on the copper pads and mechanical daisychanged FCBGA components with direct immersion gold surface finish on their copper pads. However, a materials analysis method and approach is also required to characterize and evaluate the effect of low peak temperature LF SMT processing on the PBA SLI to identify the absolute limits or “cliffs” and determine if the minimum processing temperature and TAL could be further lowered. The SLI system is characterized using various microanalytical techniques, such as, conventional optical microscopy, scanning electron microscopy, energy dispersive spectroscopy and microhardness testing. In addition, the SLI is further characterized using macroanalytical techniques such as dye penetrant testing (DPT) with controlled tensile testing for mechanical strength in addition to disbond and crack area mapping to complete the analysis.

Experimental Investigation by Speckle Interferometry of Solder Joint Failure Under Thermomechanical Load Aggravated by Boundary Conditions at Board Level

2012 ◽  
Vol 134 (4) ◽  
Author(s):  
D. N. Borza ◽  
I. T. Nistea
Keyword(s):  
Solder Joint ◽  
Fundamental Frequency ◽  
Printed Circuit Board ◽  
Speckle Interferometry ◽  
Circuit Board ◽  
Joint Failure ◽  
Printed Circuit ◽  
Out Of Plane ◽  
Fringe Patterns ◽  
Board Level

Reliability of electronic assemblies at board level and solder joint integrity depend upon the stress applied to the assembly. The stress is often of thermomechanical or of vibrational nature. In both cases, the behavior of the assembly is strongly influenced by the mechanical boundary conditions created by the printed circuit board (PCB) to casing fasteners. In many previously published papers, the conditions imposed to the fasteners are mostly aiming at an increase of the fundamental frequency and a decrease of static or dynamic displacement values characterizing the deformation. These conditions aim at reducing the fatigue in different parts of these assemblies. In the photomechanics laboratory of INSA Rouen, the origins of solder joint failure have been investigated by means of full-field measurements of the flexure deformation induced by vibrations or by forced thermal convection. The measurements were done both at a global level for the whole printed circuit board assembly (PCBA) and at a local level at the solder joints where failure was reported. The experimental technique used was phase-stepped laser speckle interferometry. This technique has a submicrometer sensitivity with respect to out-of-plane deformations induced by bending and its use is completely nonintrusive. Some of the results were comforted by comparison with a numerical finite elements model. The experimental results are presented either as time-average holographic fringe patterns, as in the case of vibrations, or as wrapped phase patterns, as in the case of deformation under thermomechanical stress. Both types of fringe patterns may be processed so as to obtain the explicit out-of-plane static deformation (or vibration amplitude) maps. Experimental results show that the direct cause of solder joint failure may be a high local PCB curvature produced by a supplementary fastening screw intended to reduce displacements and increase fundamental frequency. The curvature is directly responsible for tensile stress appearing in the leads of a large quad flat pack (QFP) component and for shear in the corresponding solder joints. The general principle of increasing the fundamental frequency and decreasing the static or dynamic displacement values has to be checked against the consequences on the PCB curvature near large electronic devices having high stiffness.

Numerical Model to Simulate the Drop Test of Printed Circuit Board (PCB)

2011 ◽  
Vol 423 ◽  
pp. 26-30
Author(s):  
S. Assif ◽  
M. Agouzoul ◽  
A. El Hami ◽  
O. Bendaou ◽  
Y. Gbati
Keyword(s):  
Solder Joint ◽  
Printed Circuit Board ◽  
Drop Test ◽  
Dynamic Responses ◽  
Circuit Board ◽  
Joint Stress ◽  
Printed Circuit ◽  
Increasing Demand ◽  
Improved Model ◽  
Board Level

Increasing demand for smaller consumer electronic devices with multi-function capabilities has driven the packaging architectures trends for the finer-pitch interconnects, thus increasing chances of their failures. A simulation of the Board Level Drop-Test according to JEDEC (Joint Electron Device Council) is performed to evaluate the solder joint reliability under drop impact test. After good insights to the physics of the problem, the results of the numerical analysis on a simple Euler-Bernoulli beam were validated against analytical analysis. Since the simulation has to be performed on ANSYS Mechanical which is an implicit software, two methods were proposed, the acceleration-input and the displacement-input. The results are the same for both methods. Therefore, the simulation is carried on the real standard model construction of the board package level2. Then a new improved model is proposed to satisfy shape regular element and accuracy. All the models are validated to show excellent first level correlation on the dynamic responses of Printed Circuit Board, and second level correlation on solder joint stress. Then a static model useful for quick design analysis and optimization’s works is proposed and validated. Finally, plasticity behavior is introduced on the solder ball and a non-linear analysis is performed.

scholarly journals Implementasi Adaptive Neural Fuzzy Inference System (ANFIS) Untuk Menguji Kualitas Printed Circuit Board (PCB)

2021 ◽  
Vol 5 (2) ◽  
pp. 79-90
Author(s):  
Tatang Rohana Cucu
Keyword(s):  
Visual Inspection ◽  
Printed Circuit Board ◽  
Fuzzy Inference ◽  
Circuit Board ◽  
Inspection System ◽  
Automated Visual Inspection ◽  
Inference System ◽  
Printed Circuit ◽  
Bahasa Indonesia ◽  
Neural Fuzzy

Pengujian kualitas menggunakan teknik pengolahan citra dan kecerdasan tiruan banyak diterapkan dalam berbagai industri, misalnya industri tekstil, perakitan kendaraan, makanan, minuman, perakitan elektronik, dan lain – lain. Pengujian model ini sering disebut dengan istilah Automated Visual Inspection System (AVIS) atau dalam bahasa Indonesia Sistem Inspeksi Visual Otomatis (SIVO). Penelitian ini mengacu pada model sistem inspeksi, di mana objek pengujiannya adalah keping Printed Circuit Board (PCB). Banyak penelitian tentang pengujian PCB yang sudah dilakukan, tetapi masih banyak yang belum memberikan hasil yang optimum, diantaranya waktu akses yang masih lambat, keakuratan data masih rendah, dan tingkat kesalahan yang masih tinggi. Berdasarkan hasil penelitian dan pengujian yang sudah dilakukan, model ANFIS sangat layak dijadikan sebagai model inferensi kecerdasan buatan dalam sistem yang berbasis inspeksi otomatis khususnya menguji kualitas keping PCB, karena terbukti model ANFIS dengan model hybrid trapesium mf memiliki tingkat kesalahan yang sangat kecil yaitu 4.0186e-007 dan untuk tingkat akurasi pengujian datanya mencapai 99%. 

A Solder Joint Reliability Model for the Philips Lumileds LUXEON Rebel LED Carrier Using Physics of Failure Methodology

2013 ◽  
Vol 2013 (1) ◽  
pp. 000887-000892 ◽  
Author(s):  
Rudi Hechfellner ◽  
Michiel Kruger ◽  
Tewe Heemstra ◽  
Greg Caswell ◽  
Nathan Blattau ◽  
...  
Keyword(s):  
Solder Joint ◽  
Printed Circuit Boards ◽  
Printed Circuit Board ◽  
Light Emitting Diodes ◽  
Coefficient Of Thermal Expansion ◽  
Thermal Control ◽  
Circuit Board ◽  
System Level ◽  
Light Emitting ◽  
Printed Circuit

Light Emitting Diodes (LEDs) are quickly evolving as the dominant lighting solution for a wide variety of applications. With the elimination of incandescent light bulbs and the toxic limitations of fluorescent bulbs, there has been a dramatic increase in the interest in high-brightness light emitting diodes (HB-LEDs). Getting the light out of the die, with reliable color, while maintaining appropriate thermal control over a long service life is a challenge. These issues must be understood and achieved to meet the needs of unique applications, such as solidstate-lighting, automotive, signage, and medical applications. These applications have requirements for 15–25 years of operation making their reliability of critical importance. The LUXEON Rebel has been accepted as an industry leading LED product, widely used in Mean-Time-Between-Failure (MTBF) sensitive applications. Customers use various mounting platforms, such as FR4 Printed Circuit Board (PCB), FR4 PCB with thermal via's, Aluminum & Copper Metal Core printed Circuit Boards (MCPCB), Super MCPCB, etc. As in other LEDs, when mounting to a platform where a large Coefficient of Thermal Expansion (CTE) exists between the LED & the PCB, Solder fatigue could become an issue that may affect system level lifetime. In this paper we have examined extreme cases and how a solder joint can impact system level reliability. We have modeled the conditions and formed a means to predict system level reliability. We have compared the prediction modeling with empirical tests for validation of the models. It is vital to understand system level reliability factors to build lighting solutions that match the application and customer expectations. It is impractical to test LEDs and other components for 50k hours ~5 years since the device evolution is much faster than that – on average one LED generation every 12–18 month. Hence we need models and prediction methods …..

An Automatic Inspection System for Chip Electronic Parts on a Printed Circuit Board

CIRP Annals ◽  
1987 ◽  
Vol 36 (1) ◽  
pp. 399-402 ◽  
Author(s):  
Tadanori Komatsu ◽  
Shinichi Uno ◽  
Mitsuji Inoue ◽  
Shingo Sekiguchi ◽  
Akira Kobayashi
Keyword(s):  
Printed Circuit Board ◽  
Circuit Board ◽  
Inspection System ◽  
Automatic Inspection ◽  
Printed Circuit ◽  
Electronic Parts
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