Research on FlexRay Bus Software Testing Technology Based on Data Acquisition and Analysis

2013 ◽  
Vol 321-324 ◽  
pp. 2807-2811
Author(s):  
Zhong Wei Chen ◽  
Xiao Xia Li ◽  
Song Yang Du ◽  
Liang Xiang
Keyword(s):  
Data Acquisition ◽  
Software Testing ◽  
Network Topology ◽  
Data Transmission ◽  
Interface Design ◽  
High Speed ◽  
Communication Protocol ◽  
High Reliability ◽  
Testing Technology ◽  
Analysis System

This paper mainly introduces FlexRay, a high speed, real-time and high reliability bus technology, and researches network topology structure and network communication protocol of FlexRay bus. Then this paper points out that the premise of analyzing FlexRay protocol is catching the bus data transmission, and designs a data acquisition and analysis system with FreeMASTER software and Tektronix TDS3012B digital phosphor oscilloscope. In order to verify the accuracy of the software FlexRay interface design, this paper also describes the analysis and verification procedure of the timing sequence of FlexRay bus. Lastly, this paper reminds of the application prospect of this system.

Multi-Thread Chain DMA Data Transfer Method for SuperSpeed Bus Video Transmissions

2014 ◽  
Vol 1046 ◽  
pp. 277-280 ◽  
Author(s):  
Ping Ping Lian
Keyword(s):  
Data Transmission ◽  
High Speed ◽  
Video Transmission ◽  
Data Transfer ◽  
Communication Protocol ◽  
High Reliability ◽  
Data Rate ◽  
Video Data ◽  
Usb Bus ◽  
Transfer Method

SuperSpeed bus, also known as USB3.0 bus or SuperSpeed USB bus, is the newest USB bus technology. This paper presents an innovative DMA transfer method called Multi-thread Chain DMA for SuperSpeed bus video data transmissions. The maximum 5Gbps giant data rate of SuperSpeed bus demands a high speed and high reliability DMA method. However, traditional DMA method can not achieve this required data rate due to its separate data transmission and reception. Unlike traditional DMA method, utilizing a novel designed mechanism, Multi-thread Chain DMA transfer method transmits and receives data concurrently, achieves SuperSpeed data rate and guarantees no data loss. Furthermore, one communication protocol for SuperSpeed video transmission is designed and implemented to comply with USB Video Class (UVC) standard. The field trial has demonstrated Multi-thread Chain DMA transfer method and SuperSpeed video communication protocol in the article are feasible and rich in value of research.

Ultrasonic Data Transmission via Wireless USB Technology

2010 ◽  
Vol 439-440 ◽  
pp. 41-45
Author(s):  
Xiao Chen
Keyword(s):  
Data Acquisition ◽  
Data Transmission ◽  
Interface Design ◽  
High Speed ◽  
High Performance ◽  
Control Unit ◽  
Signal Acquisition ◽  
Transmission Method ◽  
Usb Interface ◽  
Wireless Usb

For high-speed data acquisition and real-time transmission and processing requirements of ultrasonic measurement system, a wireless USB-based ultrasonic data transmission method was presented, combining wireless communication technology with the advantages of USB interface technology. The system consists of ultrasonic signal acquisition module, data transmission module, data acquisition module and the computer. The system uses Cypress Semiconductor's PSoC CYRF69213 chip for wireless data transmission and the chip microcomputer inside as the main control unit. This chip recorded data to the computer and displayed through USB interface. The system is a single-chip USB interface design with very few external components. The system has an USB interface advantages such supporting hot-swappable, plug and play features and the realization of wireless transmission of data without the need for layout of communications cables. The transmission system has good stability, small size, low power, high-performance features, which has a good application prospects.

Research on Reconfigurable High-Speed Serial Bus Used in High-Reliability Embedded Computer

2010 ◽  
Vol 20-23 ◽  
pp. 774-778
Author(s):  
Rui Ding ◽  
Yong Qin Hu ◽  
Wei Gong Zhang ◽  
Bo Yang
Keyword(s):  
Computer System ◽  
High Speed ◽  
Communication Protocol ◽  
High Reliability ◽  
Dynamic Reconfiguration ◽  
System A ◽  
Embedded Computer ◽  
Key Points ◽  
Application Scope

The characteristics and limitations of the buses, which are widely used nowadays, are analyzed in this paper. Because these buses don’t adapt to the high-reliability embedded computer system, a novel bus is proposed which is characterized by its high-reliability. And its capacity is reached through its unique datum’s dynamic reconfiguration mechanism. The basic architecture and communication protocol are presented in this paper. And then the key points during realization of this bus are discussed. Finally, the probably application scope and prospects are indicated.

Design of Data Transfer System Based on PCI Express Interface Applied in High-Speed Railway

2012 ◽  
Vol 229-231 ◽  
pp. 1543-1546
Author(s):  
Xiao Bo Zhou ◽  
Min Xia ◽  
Hai Long Cheng
Keyword(s):  
Data Acquisition ◽  
Data Transmission ◽  
High Speed ◽  
Data Transfer ◽  
Transmission Method ◽  
High Speed Railway ◽  
Pci Express ◽  
Data Acquisition Card ◽  
High Speed Data Acquisition ◽  
High Speed Data

To improve data transmission performance of the data acquisition card, a design of high-speed data transmission system is proposed in the thesis. Using FPGA of programmable logic devices, adopting Verilog HDL of hardware description language, the design of modularization and DMA transmission method is implemented in FPGA. Eventually the design implements the data transmission with high-speed through PCI Express interface. Through simulation and verification based on hardware system, this design is proved to be feasible and can satisfy the performance requirements of data transmission in the high-speed data acquisition card applied in high-speed railway communication. The design also has some value of application and reference for a universal data acquisition card.

scholarly journals Progress in Data Transmission and Storage for Long Pulse Data Acquisition System

2021 ◽  
Vol 2113 (1) ◽  
pp. 012065
Author(s):  
Yu Gu ◽  
Mengqi Fan ◽  
Chuanqian Tang ◽  
Guojing Zhang ◽  
Xiaodan Zhang
Keyword(s):  
Control System ◽  
Data Acquisition ◽  
Data Transmission ◽  
High Speed ◽  
Short Pulse ◽  
Test System ◽  
Data Types ◽  
Pulse Experiment ◽  
Long Pulse ◽  
And Storage

Abstract Since the study in the field of fusion has gradually developed toward the long-pulse experiment mode, long-pulse data has gradually become one of the main data types for pulsed experiments in the field of fusion. For long-pulse data, which is a kind of pulse-type data, it will be more difficult to transmit and store than short-pulse data because of its significant characteristics. In addition, in the design of data acquisition and control system (DACS) in fusion field, Experimental Physics and Industrial Control System (EPICS) has now gradually become the main framework of experimental control system to meet the diversity of devices and complexity of subsystems in large experimental system. However, due to the limitation of EPICS, its effectiveness in handling data transmission and storage under high speed data acquisition is not satisfactory. To solve the data transmission and storage under high-speed sampling, this paper proposes a data transmission and storage solution based on TCP/IP protocol and MDSplus database, which is designed with the concept of segmentation, i.e., data generated from experiments longer than 100 seconds are uploaded and stored in a segmented form. Currently, this system has been tested and applied, and the test result shows that the solution is feasible and the overall test system operates stably and reliably.

The Interface Design of TMS320C6713 and AD7679

2014 ◽  
Vol 800-801 ◽  
pp. 741-744
Author(s):  
Zhi Dong Wu ◽  
You Zheng Cui ◽  
Di Pan
Keyword(s):  
Data Acquisition ◽  
High Precision ◽  
Software Design ◽  
Interface Design ◽  
High Speed ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Specific Function ◽  
Interface Circuit

In order to meet the demands of the high precision and high speed, the interface design of TMS320C6713 and AD7679 is widely used in data acquisition system. In this paper, the interface design of TMS320C6713 and AD7679 is introduced, including the design of the interface circuit and the software design of the interface. The configuration of every register of McBSP is also expounded, including configuration method and specific function.

Design of a High-Speed Reconfigurable Serial Fieldbus with Reliable Communication Based on FPGA

2012 ◽  
Vol 490-495 ◽  
pp. 2125-2130
Author(s):  
Xue Jin Zhao ◽  
Zhu Qing Liu ◽  
Tian Liang Hu ◽  
Cheng Rui Zhang
Keyword(s):  
Data Acquisition ◽  
High Speed ◽  
Communication Protocol ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Cnc Machine ◽  
Field Bus ◽  
Reliable Communication ◽  
Baud Rate ◽  
Fieldbus System

This paper present a high-speed reconfigurable serial fieldbus (HRSFB) used for industry communication with baud rate up to 10Mbps and reliable communication. We developed this fieldbus based on UART (Universal Asynchronous Receiver/Transmitter) and practice it on FPGA. By using hardware programming on FPGA, we can get the high speed and make the bus reconfigurable easily. This fieldbus system includes one main node and up to 255 sub nodes, and all the nodes can automatically identified and configured at the beginning of the system which makes the field bus system shrink or expand easily. Also hardware CRC technology and ask/answer mode are used in the communication protocol to guarantee the security of the communication. This bus has been widely used in many fields, like PLC controller, CNC machine controller, data acquisition system and so on.

Design of Dual-Channel High-Speed Data Acquisition Card Based on USB 3.0 and FPGA

2012 ◽  
Vol 472-475 ◽  
pp. 2315-2319
Author(s):  
Peng Wang ◽  
Chen Wu
Keyword(s):  
Data Acquisition ◽  
Data Transmission ◽  
High Speed ◽  
Sampling Rate ◽  
Sampled Data ◽  
Dual Channel ◽  
Data Acquisition Card ◽  
High Speed Data Acquisition ◽  
High Speed Data ◽  
Asynchronous Parallel

A high-speed data acquisition card using USB 3.0 interface has been designed in order to solve the problem that traditional data acquisition card could not take both data transmission bandwidth and easy connection with PC into account. The data acquisition card controlled the dual-channel 12-bit 20Msps ADC for asynchronous parallel sampling using FPGA as core control module, which made the sampling rate up to 40Msps. The sampled data which was processed by FPGA transferred synchronous from FIFO interface to PC via USB controller. The basic structure of hardware and the basic design method for software and firmware were given in this paper, in which how to use FPGA to realize FIFO was elaborated in detail. The timing simulation of using asynchronous parallel A/D conversion technology and using ADC device of 40Msps sampling rate for FIFO internal data transmission were simulated respectively, thus verified the reliability of asynchronous parallel A/D conversion.

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