The Design and Implementation of a High-Speed and Large-Capacity NAND Flash Storage System

2014 ◽  
Vol 543-547 ◽  
pp. 568-571
Author(s):  
Qing Li ◽  
Shan Qing Hu ◽  
Yang Feng ◽  
Teng Long

Now, the quality of higher speed and larger capacity are required to the real-time storage system. This paper designs a high-speed and large-capacity storage system which uses FPGA as the master of SOPC system controlling NAND Flash chips. This system puts forward an advanced storage structure which has several NAND Flashes with multi-buses, forming a parallel pipeline design. By using the key technologies of bad block management and the ECC algorithm, which greatly avoids the influence of the invalid block to the storage system and reduces the probability of error data as well. It can not only improve the storage bandwidth and capacity substantially, but also ensure the reliability of the storage system effectively. As a result, the storage system achieves the capacity of 1.5TB and the bandwidth of 1280MBps. Also, this system uses high-speed exchange interface to link to the external network, which achieve the real-time transmission and control of data, and make the storage system standard, universal, and scalable.

2014 ◽  
Vol 912-914 ◽  
pp. 1222-1227 ◽  
Author(s):  
Cheng Qun Chu ◽  
Yong Feng Ren ◽  
Fang Ma

The needs of large-capacity storage in high-speed image acquisition systems require the design of reliable and efficient storage instruments. The paper presents a FPGA-based high-speed storage instrument for high speed Camera Link image acquisition system. The FPGA processes the input data and stores the results into the storage array. Multi-chip large-capacity SLC NAND Flash chips constitute a storage array, with up to 100MByte/s storage rate, is used for the digitization image signals. A multilevel high-speed buffer structure based on abundant internal block RAM resources in FPGA is used for speeding up data access. At the same time, it can take advantage of FPGA constructing the corresponding VGA timing signals to control the video conversion chip ADV7123 to realize the function of real-time display. After a description of the proposed hardware and solutions, an experimental was built to test the performance. The results have shown that the FPGA-based acquisition system is a compact and flexible solution for high-speed image acquisition applications.


2018 ◽  
Vol 51 (15) ◽  
pp. 1062-1067 ◽  
Author(s):  
Mojtaba Sharifzadeh ◽  
Mario Pisaturo ◽  
Arash Farnam ◽  
Adolfo Senatore

2012 ◽  
Vol 580 ◽  
pp. 155-159
Author(s):  
Xiang Ming Wang ◽  
Jin Chao Wang ◽  
Dong Hua Sun

In this paper, the real-time EtherCAT technology is introduced in detail, which including operating principle, communication protocol and the superiority performance of EtherCAT i.e. synchronicity, simultaneousness and high speed. To show how to design a slave system that considering the characteristics of application, the method of developing systems based no EtherCAT technology are proposed. Finally, a data acquisition system based on EtherCAT technology is designed. Application of EtherCAT technology can improve the real-time characteristics of data communication in wind power system.


2013 ◽  
Vol 367 ◽  
pp. 541-543
Author(s):  
Yun Peng Li

This article focuses on research and implementation of a kind of solid storage system that is based on NAND flash which can store the data with high speed and huge capacity. A design with quad 1.25Gsps ADC and flash storage array with 1TB is demonstrated in the paper. The design is applied widely in many fields such as radar, communication and speech recognition. The detail of hardware development is also introduced in the thesis. In addition, a method is discussed to approve the reading and writing bandwidth by parallel operations on multiple pieces of flash. By using the method, the data bandwidth is arrived 6GB/S.


2005 ◽  
Vol 2 (1) ◽  
pp. 155-165
Author(s):  
Baghdad Science Journal

Many of accurate inertial guided missilc systems need to use more complex mathematical calculations and require a high speed processing to ensure the real-time opreation. This will give rise to the need of developing an effcint


Author(s):  
Chen Yuan ◽  
Jun Wu

Abstract A real-time hard X-ray (HXR) tomographic system is designed for HL-2A tokamak, which is dedicated to the real-time tomography of fast electron bremsstrahlung radiation during the lower hybrid (LH) driven mode within the energy range of 20keV to 200keV. This system has realized the investigation of HXR energy from 12 different chords on the equatorial plane of the reaction region. The spatial and temporal resolutions of the system are 2cm and 10ms, separately. HXR detection is accomplished by a self-designed detector array, with a structure of 12 arc arranged cadmium telluride (CdTe) semiconductors and their corresponding collimators. The real-time HXR acquisition and processing is achieved by the main electronic system, which is comprised of a high speed analog-to-digital module and a high performance signal processing unit. Due to high HXR flux and the real-time demand in measurement, the HXR tomography is accomplished by several customized digital processing algorithms based on FPGA logic resources, such as the digital real-time spectrum measurement, the trapezoidal shaper, the pile up filter, and the baseline restorer, etc. This system has been proved to be qualified as a dependable platform of fast electron bremsstrahlung radiation research during LH mode on HL-2A, which provides indispensable parameters for plasma state during fusion reaction.


2013 ◽  
Vol 401-403 ◽  
pp. 1023-1026
Author(s):  
Jie Sun ◽  
Jun Zhang ◽  
An Bing Zhao

With the development of network technology, distributed system has been widely used in the area of measurement and control. This paper introduces a kind of distributed network spectrometer. The proposed method based on embedded technology and GPRS network technology, which achieve the real-time detection of targets from multiple locations.


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