Design of a High-Speed Image Data Real-Time Storage and Display Circuit

2014 ◽  
Vol 912-914 ◽  
pp. 1222-1227 ◽  
Author(s):  
Cheng Qun Chu ◽  
Yong Feng Ren ◽  
Fang Ma
Keyword(s):  
Real Time ◽  
High Speed ◽  
Image Acquisition ◽  
Image Data ◽  
Data Access ◽  
Acquisition System ◽  
Nand Flash ◽  
Large Capacity ◽  
Storage Rate ◽  
Internal Block

The needs of large-capacity storage in high-speed image acquisition systems require the design of reliable and efficient storage instruments. The paper presents a FPGA-based high-speed storage instrument for high speed Camera Link image acquisition system. The FPGA processes the input data and stores the results into the storage array. Multi-chip large-capacity SLC NAND Flash chips constitute a storage array, with up to 100MByte/s storage rate, is used for the digitization image signals. A multilevel high-speed buffer structure based on abundant internal block RAM resources in FPGA is used for speeding up data access. At the same time, it can take advantage of FPGA constructing the corresponding VGA timing signals to control the video conversion chip ADV7123 to realize the function of real-time display. After a description of the proposed hardware and solutions, an experimental was built to test the performance. The results have shown that the FPGA-based acquisition system is a compact and flexible solution for high-speed image acquisition applications.

The Design of High-Speed CMOS Imaging System Based on SOPC Technology

2010 ◽  
Vol 39 ◽  
pp. 523-528
Author(s):  
Xin Hua Yang ◽  
Yuan Yuan Shang ◽  
Da Wei Xu ◽  
Hui Zhuo Niu
Keyword(s):  
High Speed ◽  
Imaging System ◽  
Image Acquisition ◽  
Image Data ◽  
Image Sensor ◽  
Acquisition System ◽  
Storage Unit ◽  
Data Encoding ◽  
Acquisition Speed ◽  
Image Acquisition System

This paper introduces a design of a high-speed image acquisition system based on Avalon bus which is supported with SOPC technology. Some peripherals embedded in Avalon bus were customized and utilized in this system, such as imaging unit, decoding unit and storage unit, and these improved the speed of the whole imaging system. The data is compressed to three-fourths of the original by the decoding unit. A custom DMA is designed for moving the image data to the two caches of the SDRAM. This approach discards the method that FIFO must be put up in the traditional data acquisition system. And therefore, it reduced the CPU’s task for data moving. At the same time, the image acquisition and the data transmission can complete a parallel job. Finally, the design is worked on the high-speed image acquisition system which is made up of 2K*2K CMOS image sensor. And it improved the image acquisition speed by three ways: data encoding, custom DMA controller and the parallel processing.

The Design of Image Acquisition and Preprocess System Based on FPGA

2011 ◽  
Vol 71-78 ◽  
pp. 4269-4273
Author(s):  
Jie Jia ◽  
Jian Yong Lai ◽  
Gen Hua Zhang ◽  
Huan Ling
Keyword(s):  
Real Time ◽  
Data Streams ◽  
High Speed ◽  
Image Acquisition ◽  
Image Data ◽  
Ccd Camera ◽  
Median Filtering ◽  
Image Preprocessing ◽  
Filtering Algorithm ◽  
Ping Pong

To deal with the large amount of data and complex computing problems during high-speed image acquisition, the image acquisition and preprocess system based on FPGA is designed in the paper. In order to obtain continuous and integrity of image data streams, the design has completed the acquisition of CCD camera video signal and implementation of de-interlacing ping-pong cache. The fast median filtering algorithm is used for image preprocessing, and finally the preprocessed image data is displayed on CRT. Experiments indicate that the design meets requirements of image sample quality and balances the real-time demand.

The Design of High Speed and Parallel Convolutional Encoder Based on FPGA

2013 ◽  
Vol 760-762 ◽  
pp. 1438-1442
Author(s):  
Yan Yan Liu ◽  
Yin Han Gao ◽  
Guang Qiu Chen ◽  
En Guo Wang
Keyword(s):  
Real Time ◽  
High Speed ◽  
Convolutional Code ◽  
Image Data ◽  
Transition Diagram ◽  
Large Capacity ◽  
Coding Efficiency ◽  
Encoding Method ◽  
Convolutional Encoding ◽  
Convolutional Encoder

For the channel source of large capacity image data, the error correcting capability and coding efficiency of channel encoding is very important, in order to solve the real-time and parallel of encoding, a kind of code encoding method realized easily by FPGA is proposed. First, the coding principle of the convolutional code is introduced in detail; Secondly, the representation method of the convolutional encoder is elaborated, including the state transition diagram and the grid diagram of the convolutional code; Then, the convolutional encoding algorithm based on FPGA will be converting to achieve rapid, parallel processing method; Finally, (2,1,7) convolutional code algorithm is simulated and tested. The experimental results show that: the convolutional encoding module is capable of handling the input data stream of up to 160Mbps, processing speed, to meet the parallel and real-time of convolutional encoding for the channel source of large capacity image data, to improve the efficiency of convolutional encoding.

CMOS Real-Time Image Acquisition and Display System Design Based on FPGA

2014 ◽  
Vol 644-650 ◽  
pp. 4403-4406
Author(s):  
Jian Wei Leng ◽  
Ying Hui Wu
Keyword(s):  
Data Acquisition ◽  
System Design ◽  
Real Time ◽  
High Speed ◽  
Image Acquisition ◽  
Control Unit ◽  
Image Sensor ◽  
Acquisition System ◽  
Sensor Data ◽  
Time Data

Based on characteristics of image acquisition system of high-speed and large-capacity, this paper presents a CMOS Image sensor data acquisition system that is using FPGA Chip as its core processing devices. Data acquisition logic control unit is designed by FPGA. The modular structure of the system design, FIFO, ping-pong and other technology are used in the design process to ensure real-time data acquisition and transmission. FPGA implementation of video acquisition can improve system performance. It also has a strong adaptability and flexibility, and it is easy to design, debug and so on. Through the experiment, we can get a clear image.

Design of Data Acquisition System Based on FPGA

2011 ◽  
Vol 403-408 ◽  
pp. 1592-1595
Author(s):  
Guo Sheng Xu
Keyword(s):  
Data Processing ◽  
Data Acquisition ◽  
Real Time ◽  
High Speed ◽  
Image Data ◽  
Data Acquisition System ◽  
Acquisition System ◽  
Time Data ◽  
Real Time Processing ◽  
Field Programmable

A new kind of data acquisition system is introduced in this paper, in which the multi-channel synchronized real-time data acquisition under the coordinate control of field-programmable gate array(FPGA) is realized. The design uses field programmable gate arrays(FPGA) for the data processing and logic control. For high speed CCD image data processing, the paper adopts regional parallel processing based on FPGA. The FPGA inner block RAM is used to build high speed image data buffer is put into operation to achieve high speed image data integration and real-time processing. The proposed data acquisition system has characteristics of stable performance, flexible expansion, high real-timeness and integration

The Design of Image Acquisition System Based on Contex-M3

2013 ◽  
Vol 278-280 ◽  
pp. 1148-1152
Author(s):  
Fan Zhang ◽  
Jian Dong Mao ◽  
Zhi Min Rao ◽  
Ya Ya Zhang
Keyword(s):  
High Speed ◽  
Low Cost ◽  
Image Acquisition ◽  
Reference Value ◽  
Image Data ◽  
Image Sensors ◽  
Acquisition System ◽  
Similar System ◽  
Image Acquisition System ◽  
Sd Card

A CMOS image acquisition system based on Contex-M3 is developed. In design STM32F103X is selected as the main controller, OV7670 is used for image sensors. In order to capture high-speed digital image, the FIFO buffer chip AL422B and SD Card under the control of the DMA are employed to directly transfer data. Moreover the SD card and 2.8 inch TFT LCD are selected to storage and display image data, respectively. Because of small size, low power, simple structure and low cost, the image acquisition system can provide an important reference value for development of similar system.

Research and Design of Image Acquisition System Using USB2.0 Interface

2013 ◽  
Vol 347-350 ◽  
pp. 1594-1597
Author(s):  
Jin Hai Zhang
Keyword(s):  
Image Processing ◽  
High Speed ◽  
Image Acquisition ◽  
Image Data ◽  
Acquisition System ◽  
Computer Interface ◽  
Processing Technologies ◽  
Acquisition Device ◽  
Image Acquisition System ◽  
Research And Design

Image acquisition is to study an image acquisition, transmission and storage of information, is the basis of image processing technologies. Currently most of the image acquisition device through the computer interface in the image data into the computer, with high speed and large storage capacity of the computer complete the image acquisition. Traditional computer interface in image processing of data if there is a problem such as high cost, inconvenience, in response to this situation, this paper proposes a USB2.0 interface technology of image acquisition system programme.

Design and Implementation of High Speed Image Data Protocol Conversion System

2013 ◽  
Vol 333-335 ◽  
pp. 980-983
Author(s):  
Yan Fei Liu ◽  
Qi Li ◽  
Jian Feng Xu ◽  
Suo Li Guo
Keyword(s):  
High Speed ◽  
Low Voltage ◽  
Image Acquisition ◽  
Image Data ◽  
Acquisition System ◽  
Good Ability ◽  
Protocol Conversion ◽  
Differential Signaling ◽  
Ping Pong ◽  
Image Acquisition System

This paper presented a high-speed image acquisition system based on PXI bus and Low Voltage Differential Signaling (LVDS) technology, with the characteristics of mass data, high-speed of data acquisition in the field of modem technology and scientific research. It expatiated the whole frame, and emphasized the design and implement of the system. It simulated the Ping-Pong operation of image data transmission, and tested the performance of the system. The results of test indicate that the high-speed image acquisition system has good ability of acquisition and transmission, and it can satisfy the engineering applied demand.

The Design and Implementation of a High-Speed and Large-Capacity NAND Flash Storage System

2014 ◽  
Vol 543-547 ◽  
pp. 568-571
Author(s):  
Qing Li ◽  
Shan Qing Hu ◽  
Yang Feng ◽  
Teng Long
Keyword(s):  
Real Time ◽  
High Speed ◽  
Storage System ◽  
Nand Flash ◽  
Large Capacity ◽  
Probability Of Error ◽  
The Real ◽  
Parallel Pipeline ◽  
And Control ◽  
Pipeline Design

Now, the quality of higher speed and larger capacity are required to the real-time storage system. This paper designs a high-speed and large-capacity storage system which uses FPGA as the master of SOPC system controlling NAND Flash chips. This system puts forward an advanced storage structure which has several NAND Flashes with multi-buses, forming a parallel pipeline design. By using the key technologies of bad block management and the ECC algorithm, which greatly avoids the influence of the invalid block to the storage system and reduces the probability of error data as well. It can not only improve the storage bandwidth and capacity substantially, but also ensure the reliability of the storage system effectively. As a result, the storage system achieves the capacity of 1.5TB and the bandwidth of 1280MBps. Also, this system uses high-speed exchange interface to link to the external network, which achieve the real-time transmission and control of data, and make the storage system standard, universal, and scalable.

scholarly journals Module to Support Real-Time Microscopic Imaging of Living Organisms on Ground-Based Microgravity Analogs

2021 ◽  
Vol 11 (7) ◽  
pp. 3122
Author(s):  
Srujana Neelam ◽  
Audrey Lee ◽  
Michael A. Lane ◽  
Ceasar Udave ◽  
Howard G. Levine ◽  
...  
Keyword(s):  
Real Time ◽  
High Speed ◽  
Simulated Microgravity ◽  
Image Acquisition ◽  
Time Lapse ◽  
Moving Frames ◽  
Cell Functions ◽  
Microgravity Simulation ◽  
Division Cell ◽  
Over Time

Since opportunities for spaceflight experiments are scarce, ground-based microgravity simulation devices (MSDs) offer accessible and economical alternatives for gravitational biology studies. Among the MSDs, the random positioning machine (RPM) provides simulated microgravity conditions on the ground by randomizing rotating biological samples in two axes to distribute the Earth’s gravity vector in all directions over time. Real-time microscopy and image acquisition during microgravity simulation are of particular interest to enable the study of how basic cell functions, such as division, migration, and proliferation, progress under altered gravity conditions. However, these capabilities have been difficult to implement due to the constantly moving frames of the RPM as well as mechanical noise. Therefore, we developed an image acquisition module that can be mounted on an RPM to capture live images over time while the specimen is in the simulated microgravity (SMG) environment. This module integrates a digital microscope with a magnification range of 20× to 700×, a high-speed data transmission adaptor for the wireless streaming of time-lapse images, and a backlight illuminator to view the sample under brightfield and darkfield modes. With this module, we successfully demonstrated the real-time imaging of human cells cultured on an RPM in brightfield, lasting up to 80 h, and also visualized them in green fluorescent channel. This module was successful in monitoring cell morphology and in quantifying the rate of cell division, cell migration, and wound healing in SMG. It can be easily modified to study the response of other biological specimens to SMG.

Sign in / Sign up

Export Citation Format

Share Document