Signal Processing Circuit Design Based on SOPC Technology for the Electric Field Type Time Grating Sensors

2014 ◽  
Vol 635-637 ◽  
pp. 755-759
Author(s):  
Fang Yan Zheng ◽  
Zi Ran Chen ◽  
Zhi Cheng Yu

Signal processing circuits are proposed for the electric field type time grating sensors. The proposed design scheme integrates sampling function and processing function into a signal field programmable gate array (FPGA) based on system on programmable chip (SOPC) technology. Employing NiosII technology and adding self-defined instructions improve data processing speed for time grating sensors. The proposed signal processing circuits are simple and stabile. The proposed signal processing circuits are applied to electric field type linear time grating sensors, the experiments results that the peak-to peak measuring error is 0.3um within 200mm without any corrections.

2013 ◽  
Vol 347-350 ◽  
pp. 1328-1332
Author(s):  
Xiao Dong Cai ◽  
Zhi Gang Liu

The signal processing circuit based on FPGA was proposed in the paper, carrying out the function such as programmable signal amplification, adaptive filtering and so on. Among them, the programmable amplifier module was achieved with the programmable gain amplifier in series; Adaptive filter module was implemented with the Butterworth second-order active filter, to change the cutoff frequency of the filter by changing the potentiometer resistance. Experimental results show that the signal processing circuit was applied in the infrared optical system improving the signal to noise ratio of the image effectively.


Author(s):  
Bambang Guruh Irianto ◽  
Budhiaji Budhiaji ◽  
Syaifudin Syaifudin

ECG machine on the market, has a considerable cost, the technology used is still very complicated. In efficient and display ECG still not interconnect with other devices. In this study, the researchers designed ECG machine 12 channels to take advantage ATMega microcontroller technology, Graphic LCD 64x12, which can be obtained on the market at low prices, thus yielding a portable ECG apparatus, can interconnect with other devices and cheap. Objective is to design a  ECG machine using ATMega microcontroller technology, by making a series of bio amplifier ECG, measuring the amplitude and frequency response bio amplifier, and make the ECG signal processing circuit with microcontroller, which can be displayed on a 128x64 graphic LCD or PC. To answer the research objectives, the design of the research is to use pure experimental research is the design of experimental series. The independent variable ECG phantom or human and the dependent variable is the ECG machine. While the design  ECG machine  through the stages as follows: circuit design, circuit testing and calibration output. The conclusion of this study: The result of the design of microcontroller ATMega program listings can be used transform and run the program to the ECG machine to know the number of heartbeats, a beep sound every wave R  the ECG signal, displayed on the graphical LCD, PC, printed through a computer, and can be stored in computer.


2020 ◽  
Vol 91 (10) ◽  
pp. 104707
Author(s):  
Yinyu Liu ◽  
Hao Xiong ◽  
Chunhui Dong ◽  
Chaoyang Zhao ◽  
Quanfeng Zhou ◽  
...  

2021 ◽  
Vol 20 (2) ◽  
pp. 1-25
Author(s):  
Celia Dharmaraj ◽  
Vinita Vasudevan ◽  
Nitin Chandrachoodan

Approximate circuit design has gained significance in recent years targeting error-tolerant applications. In the literature, there have been several attempts at optimizing the number of approximate bits of each approximate adder in a system for a given accuracy constraint. For computational efficiency, the error models used in these routines are simple expressions obtained using regression or by assuming inputs or the error is uniformly distributed. In this article, we first demonstrate that for many approximate adders, these assumptions lead to an inaccurate prediction of error statistics for multi-level circuits. We show that mean error and mean square error can be computed accurately if static probabilities of adders at all stages are taken into account. Therefore, in a system with a certain type of approximate adder, any optimization framework needs to take into account not just the functionality of the adder but also its position in the circuit, functionality of its parents, and the number of approximate bits in the parent blocks. We propose a method to derive parameterized error models for various types of approximate adders. We incorporate these models within an optimization framework and demonstrate that the noise power is computed accurately.


2004 ◽  
Vol 383 (3-4) ◽  
pp. 235-239 ◽  
Author(s):  
M. Senthil Kumar ◽  
T.H. Kim ◽  
S.H. Lee ◽  
S.M. Song ◽  
J.W. Yang ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document