A Method Study on Assembly of Single-Wall Carbon Nanotube Field Effect Transistor Using Dielectrophoresis

2010 ◽  
Vol 139-141 ◽  
pp. 1550-1553 ◽  
Author(s):  
Ke Xu ◽  
Cheng Dong Wu ◽  
Xiao Jun Tian ◽  
Ying Zhang ◽  
Zai Li Dong

Single-wall carbon nanotubes are candidates for a number of building blocks in nanoscale electronics. With respect to the assembly of carbon nanotube field effect transistor, the dielectrophoresis technology is adopted, which assembles SWCNTs between the micro-electrodes, SWCNTs are affected by the electrophoretic force which is carried out by the related theoretical analysis in a nonuniform electric field. The driving electric field of dielectrophoresis is simulated by the comsol software. According to the simulation results, a number of the experiments are done. It turns out that the required experimental parameters of the efficient assembly of SWCNT were obtained. AFM scanning and electrical properties of SWCNTs show that the method can achieve the effective assembly of carbon nanotube field effect transistor. SWCNTs are driven in the microelectrode gap, having a good arrangement of uniform orientation and assembly results, and proportional to the arrangement density along the electrode width direction and the duration of DEP. Meanwhile, it also provides an effective method of assembly and manufacture for other one-dimensional nanomaterials assembly of nanoelectronic devices.

2013 ◽  
Vol 2013 ◽  
pp. 1-5 ◽  
Author(s):  
Michael Loong Peng Tan

Long channel carbon nanotube transistor (CNT) can be used to overcome the high electric field effects in nanoscale length silicon channel. When maximum electric field is reduced, the gate of a field-effect transistor (FET) is able to gain control of the channel at varying drain bias. The device performance of a zigzag CNTFET with the same unit area as a nanoscale silicon metal-oxide semiconductor field-effect transistor (MOSFET) channel is assessed qualitatively. The drain characteristic of CNTFET and MOSFET device models as well as fabricated CNTFET device are explored over a wide range of drain and gate biases. The results obtained show that long channel nanotubes can significantly reduce the drain-induced barrier lowering (DIBL) effects in silicon MOSFET while sustaining the same unit area at higher current density.


2003 ◽  
Vol 14 (2) ◽  
pp. 327-331 ◽  
Author(s):  
Bakir Babi  ◽  
Mahdi Iqbal ◽  
Christian Sch nenberger

2011 ◽  
Vol 8 (2) ◽  
pp. 261-267 ◽  
Author(s):  
Mohammad Taghi Ahmadi ◽  
Razali Ismail ◽  
Zaharah Johari ◽  
Jeffrey Frank Webb

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