Digital Frequency Multiplying Method for the Power System Frequency Tracking Based on FPGA

2011 ◽  
Vol 328-330 ◽  
pp. 1747-1750
Author(s):  
Cui Yun Gao ◽  
Wen Jing Li ◽  
Ming Liu ◽  
Ru Han

The paper propose the digital frequency multiplying method based on frequency de-noising on FPGA, aiming at the frequency aliasing of the high frequency interference in the power system frequency tracking circuit. The basic principle and hardware realization are discussed.The performance of the system is tested using two different system clock, the experiments show that: This method can eliminate the error caused by frequency aliasing, and improve the interference immunity of the system. In addition, experiments also proved that using higher system clock can improve accuracy absolutely.

2021 ◽  
Vol 11 (15) ◽  
pp. 7007
Author(s):  
Janusz P. Paplinski ◽  
Aleksandr Cariow

This article presents an efficient algorithm for computing a 10-point DFT. The proposed algorithm reduces the number of multiplications at the cost of a slight increase in the number of additions in comparison with the known algorithms. Using a 10-point DFT for harmonic power system analysis can improve accuracy and reduce errors caused by spectral leakage. This paper compares the computational complexity for an L×10M-point DFT with a 2M-point DFT.


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