A Low Temperature Coefficient, High Voltage Detection Circuit Used in Power over Ethernet

2012 ◽  
Vol 588-589 ◽  
pp. 839-842 ◽  
Author(s):  
Zhi Cheng Hu ◽  
Zhi Hua Ning ◽  
Le Nian He

A low temperature coefficient, high voltage detection circuit used in Power over Ethernet is proposed. This circuit realizes the detection comparison without utilizing an extra voltage reference circuit and comparator while the temperature coefficient of the threshold voltage is as low as that of a regular bandgap reference. The proposed detection circuit is implemented in CSMC 0.5μm 60V BCD process, Cadence Spectre simulation results show that the temperature coefficient of the threshold voltage is 66.5 ppm/°C over the temperature range of -40°C to 125°C, and the maximum variation of the threshold voltage is 2.7% under all corners.

2018 ◽  
Vol 232 ◽  
pp. 04072
Author(s):  
XingGuo Tian ◽  
XiaoNing Xin ◽  
DongYang Han

In order to meet the market demand for wide temperature range and high precision bandgap voltage reference, this paper designs a bandgap reference with wide temperature range and low temperature coefficient. In this paper, the basic implementation principle of the bandgap reference is analyzed.On the basis of the traditional bandgap reference circuit structure,this design adds a trimming network and a temperature compensation network. A new Gaussian bell curve compensation technique is adopted to compensate the low temperature section, and the normal temperature section and the high temperature section respectively. Compared with the existing compensation technology, the versatility and the compensation effect is better. The designed circuit is designed and manufactured based on the Huahong HHNECGE0.35um process. The results show that the output voltage is 2.5V at 2.7V supply voltage and temperature range of -40-125°C.at typical process angle ,the temperature coefficient is 0.54618 PPm/°C,and is within 1PPm/°C at other process angles.


2019 ◽  
Vol 44 (1) ◽  
pp. 159-164
Author(s):  
Jin Yang ◽  
Yuehua Dai ◽  
Xianwei Jiang ◽  
Junning Chen

2014 ◽  
Vol 23 (08) ◽  
pp. 1450107 ◽  
Author(s):  
JUN-DA CHEN ◽  
CHENG-KAI YE

This paper presents an approach to the design of a high-precision CMOS voltage reference. The proposed circuit is designed for TSMC 0.35 μm standard CMOS process. We design the first-order temperature compensation bandgap voltage reference circuit. The proposed post-simulated circuit delivers an output voltage of 0.596 V and achieves the reported temperature coefficient (TC) of 3.96 ppm/°C within the temperature range from -60°C to 130°C when the supply voltage is 1.8 V. When simulated in a smaller temperature range from -40°C to 80°C, the circuit achieves the lowest reported TC of 2.09 ppm/°C. The reference current is 16.586 μA. This circuit provides good performances in a wide range of temperature with very small TC.


2020 ◽  
Vol 17 (1) ◽  
pp. 31-40
Author(s):  
Guru Prasad ◽  
Kumara Shama

In this paper, design of a voltage reference circuit using only MOS transistors and without employing an operational amplifier is presented. A proportional to absolute temperature [PTAT] voltage and a PTAT current are designed then difference of the PTAT voltage and product of the PTAT current and resistor gives the temperature independent voltage. The advantages of both sub-threshold and strong inversion region operation of MOS transistors are exploited in the design. The voltage reference is implemented using standard CMOS 180 nm technology. The voltage reference provides a voltage of 224.3 mV consuming a quiescent current of 30 ?A at room temperature. Post layout simulation results show that the proposed voltage reference has a temperature coefficient of 167.18 ppm/?C and varies only 3mV when there is a ?10% variation in supply voltage. The circuit occupies an area of only 93.6?32.6?m on the chip, making it suitable for area constraint applications.


2018 ◽  
Vol 27 (07) ◽  
pp. 1850105 ◽  
Author(s):  
Yuhua Liang ◽  
Zhangming Zhu

A low-power, low-supply, low-complexity all-MOSFET voltage reference is implemented in 0.18[Formula: see text][Formula: see text]m CMOS process. With the proposed architecture, the number of the transistors can be reduced to the greatest extent. As a result, the supply voltage can not only be decreased to as low as 0.7[Formula: see text]V, but the power consumption can also be optimized significantly. Simulation results show that the power consumption is 47[Formula: see text]nW, at a supply of 0.7[Formula: see text]V. A temperature coefficient (TC) of 42[Formula: see text]ppm/[Formula: see text]C is achieved when the temperature ranges from [Formula: see text]20[Formula: see text]C to 80[Formula: see text]C. At room temperature, the voltage reference features a line regulation (LR) of 2.66%/V.


2014 ◽  
Vol 519-520 ◽  
pp. 1067-1070
Author(s):  
Jian Ying Shi ◽  
Hui Ya Li ◽  
Yan Bin Xu

A no op amp structure full CMOS reference voltage circuit is designed. The two currents which are proportional to absolute temperature (PTAT) and complementary to absolute temperature (CTAT) are added together to get the reference output voltage which is obtained through a resistance. The characteristics of the new circuit are simulated using 0.5 μm BSIM3V3 spice models in HSPICE. The simulation results show that the output voltage of the circuit is 997mV, the power consumption is 1.12mW, the temperature coefficient is 15.2 ppm/°C in the range from-30°C to 100°C at the supply voltage of 2V.


2014 ◽  
Vol 981 ◽  
pp. 66-69
Author(s):  
Ming Yuan Ren ◽  
En Ming Zhao

This paper presents a design and analysis method of a bandgap reference circuit. The Bandgap design is realized through the 0.18um CMOS process. Simulation results show that the bandgap circuit outputs 1.239V in the typical operation condition. The variance rate of output voltage is 0.016mV/°C? with the operating temperature varying from-60°C? to 160°C?. And it is 3.27mV/V with the power supply changes from 1.8V to 3.3V.


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