Ultra-Low-Power Electrophoretic Deposition of Silica Powder with Nonflammable Organic Solvent

2015 ◽  
Vol 654 ◽  
pp. 88-93
Author(s):  
Hideyuki Negishi

Although conventional organic solvents are used in electrophoretic deposition (EPD) owing to several advantages, they are hazardous because of their inflammability or ignition properties. In contrast, hydrofluoro ether (HFE) is nonflammable, polar and possesses excellent electrical insulation properties. In this study, methoxy-nonafluorobutane (MNFB), which is one of HFE was used as the solvent for the EPD of silica powder. Because the density of MNFB is larger than water, sedimentation of inorganic particles is slow. The deposition behavior in MNFB was similar to the EPD in conventional solvents, and was controlled by tuning the applied voltage, deposition time, and particle concentration. A uniform coating was obtained. Notably, the power consumed in this process was significantly lower than that in the EPD using conventional solvents. The current density was of the order of 10 nA/cm2; therefore, the electric power consumption for EPD using MNFB was less than 0.1% of those using conventional solvents. Therefore, MNFB can be used as an effective solvent for EPD because it is nonflammable, allows the application of high voltage, and enables the deposition of particles with low power consumption.

2016 ◽  
Vol 136 (11) ◽  
pp. 1555-1566 ◽  
Author(s):  
Jun Fujiwara ◽  
Hiroshi Harada ◽  
Takuya Kawata ◽  
Kentaro Sakamoto ◽  
Sota Tsuchiya ◽  
...  

Nano Letters ◽  
2013 ◽  
Vol 13 (4) ◽  
pp. 1451-1456 ◽  
Author(s):  
T. Barois ◽  
A. Ayari ◽  
P. Vincent ◽  
S. Perisanu ◽  
P. Poncharal ◽  
...  

Electronics ◽  
2021 ◽  
Vol 10 (8) ◽  
pp. 889
Author(s):  
Xiaoying Deng ◽  
Peiqi Tan

An ultra-low-power K-band LC-VCO (voltage-controlled oscillator) with a wide tuning range is proposed in this paper. Based on the current-reuse topology, a dynamic back-gate-biasing technique is utilized to reduce power consumption and increase tuning range. With this technique, small dimension cross-coupled pairs are allowed, reducing parasitic capacitors and power consumption. Implemented in SMIC 55 nm 1P7M CMOS process, the proposed VCO achieves a frequency tuning range of 19.1% from 22.2 GHz to 26.9 GHz, consuming only 1.9 mW–2.1 mW from 1.2 V supply and occupying a core area of 0.043 mm2. The phase noise ranges from −107.1 dBC/HZ to −101.9 dBc/Hz at 1 MHz offset over the whole tuning range, while the total harmonic distortion (THD) and output power achieve −40.6 dB and −2.9 dBm, respectively.


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