Intrinsic Point Defect Engineering in Silicon High-Voltage Power Device Technology

1997 ◽  
Vol 258-263 ◽  
pp. 1801-1806 ◽  
Author(s):  
N.A. Sobolev
2016 ◽  
Vol 4 (43) ◽  
pp. 16834-16840 ◽  
Author(s):  
Zihang Liu ◽  
Huiyuan Geng ◽  
Jun Mao ◽  
Jing Shuai ◽  
Ran He ◽  
...  

Thorough first-principles calculations reveal that an Ag vacancy is the dominant intrinsic point defect in α-MgAgSb. Point-defect engineering can be realized via rationally controlling the hot press temperature due to the recovery effect.


2020 ◽  
Vol 13 (12) ◽  
pp. 120101
Author(s):  
Tsunenobu Kimoto ◽  
Heiji Watanabe

2021 ◽  
Vol 84 ◽  
pp. 10-15
Author(s):  
Yang Yu ◽  
Yu Zhao ◽  
Yu-Long Qiao ◽  
Yu Feng ◽  
Wei-Li Li ◽  
...  

2004 ◽  
Vol 96 (1) ◽  
pp. 919-921 ◽  
Author(s):  
Lin Shao ◽  
John Chen ◽  
Jianming Zhang ◽  
D. Tang ◽  
Sanjay Patel ◽  
...  

2001 ◽  
Author(s):  
Giho Cha ◽  
Youngchul Kim ◽  
Hyungwoo Jang ◽  
Hyunsoon Kang ◽  
Changsub Song

1999 ◽  
Vol 33 (5) ◽  
pp. 531-535
Author(s):  
N. K. Morozova ◽  
I. A. Karetnikov ◽  
V. V. Blinov ◽  
V. K. Komar ◽  
V. G. Galstan ◽  
...  

2018 ◽  
Vol 201 ◽  
pp. 02004
Author(s):  
Shao-Ming Yang ◽  
Gene Sheu ◽  
Tzu Chieh Lee ◽  
Ting Yao Chien ◽  
Chieh Chih Wu ◽  
...  

High performance power device is necessary for BCD power device. In this paper, we used 3D Synopsis TCAD simulation tool Sentaurus to develop 120V device and successfully simulated. We implemented in a conventional 0.35um BCDMOS process to present of a novel high side 120V LDMOS have reduced surface field (RESURF) and Liner p-top structure with side isolation technology. The device has been research to achieve a benchmark specific on-resistance of 189 mΩ-mm2 while maintaining horizontal breakdown voltage and vertical isolation voltage both to target breakdown voltage of 120V. In ESOA, we also proposed a better performance of both device without kirk effect.


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