Surface Optimization of Random Pyramid Textured Silicon Substrates for Improving Heterojunction Solar Cells

Key steps in the fabrication of high-efficiency a-Si:H/c-Si heterojunction solar cells are the controlled pyramid texturing of the c-Si substrates to minimize reflection losses and the subsequent passivation by deposition of a high-quality a-Si:H layer to reduce recombination losses. This contribution reviews our recent results on the optimization of the wet-chemical texturing of crystalline Si wafers for the preparation of heterojunction solar cells with respect to low reflection losses, low recombination losses and long minority carrier lifetimes. It is demonstrated, that by joint optimization of both saw damage etch and texture etch the optical and electronic properties of the resulting pyramid morphology can be controlled. Effective surface passivation and thus long minority charge carrier lifetimes are achieved by deposition of intrinsic amorphous Si ((i) a-Si:H) layers. It is shown, that optimized (i) a-Si:H deposition parameters for planar Si (111) wafers can be transferred to a-Si:H layer deposition on random pyramid textured Si (100) wafers. Statistical analysis of the pyramid size distribution revealed that a low fraction of small pyramids leads to longer minority charge carrier lifetimes and, thus, a higher Voc potential for solar cells.