Silicon Surface Cleaning after Spacer Dry Etching

2001 ◽  
Vol 76-77 ◽  
pp. 303-306 ◽  
Author(s):  
Denis Shamiryan ◽  
Mikhail R. Baklanov ◽  
Serge Vanhaelemeersch
1993 ◽  
Vol 315 ◽  
Author(s):  
John O. Borland ◽  
Carol Riggi ◽  
Faye Brocious

1992 ◽  
Vol 282 ◽  
Author(s):  
S. Veprek ◽  
Ch. Wang ◽  
G. Ratz

ABSTRACTWe present data on the temperature dependence of the etch rate of silicon and silicon dioxide in order to elucidate optimum conditions for the selective oxygen removal from the silicon surface. Both, the etching temperature and ion bombardment have a pronounced influence on the surface morphology. The conditions yielding a minimum surface roughness will be presented. A careful control of the oxygen impurities of the hydrogen plasma in the range between about 1–3 ppm and 60 ppm allow us to control the degree of anisotropy of etching of patterned silicon wafers.


2015 ◽  
Vol 54 (4S) ◽  
pp. 04DR07
Author(s):  
Li Zhang ◽  
Fang Yang ◽  
Jun He ◽  
Xian Huang ◽  
Dacheng Zhang
Keyword(s):  

2001 ◽  
Vol 226 (4) ◽  
pp. 443-450 ◽  
Author(s):  
Takumi Nakahata ◽  
Kazuma Yamamoto ◽  
Junji Tanimura ◽  
Toru Inagaki ◽  
Taisuke Furukawa ◽  
...  

1997 ◽  
Vol 477 ◽  
Author(s):  
A. Corradi ◽  
E. Borzoni ◽  
P. Godio ◽  
G. Borionetti

ABSTRACTThe effect of different silicon wafer surface preparation in modulating gate oxide quality performance has been studied through an experimental design which examines key phases of wafer cleaning and polishing processes. An interpretation of the root causes of GOI degradation has been proposed and discussed.


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