Analysis on Signal and Power Integrity of 2.3D Structure Organic Package

2019 ◽  
Vol 2019 (1) ◽  
pp. 000381-000386 ◽  
Author(s):  
Kosuke Tsukamoto ◽  
Atsunori Kajiki ◽  
Yuji Kunimoto ◽  
Masayuki Mizuno ◽  
Manabu Nakamura ◽  
...  
Keyword(s):  
Power Distribution ◽  
Signal Integrity ◽  
High Density ◽  
Point Of View ◽  
Power Delivery ◽  
Power Integrity ◽  
Power Distribution Network ◽  
Organic Packages ◽  
High Bandwidth ◽  
Vertical Interconnection

Abstract Heterogeneous packaging is one of the advanced technologies. Especially for high-end applications such as data center server, HPC and Artificial-Intelligence (AI), High-Bandwidth Memory (HBM) integration is a key and strongly required. As we know, the 2.5D silicon interposer packaging is an expanded solution for HBM interconnections. However, we developed 2.1D high density organic package called i-THOP® (integrated-Thin film High density Organic Package) to take advantages of an organic solution. Furthermore, we are now focusing on 2.3D i-THOP® to have more benefits in the manufacturing. The 2.3D structure consists of two substrates. One is a thin i-THOP® interposer, the other one is a conventional build-up (BU) substrate. These two substrates are combined as the interposer placed onto the build-up substrate. In this paper, the electrical properties of 2.3D i-THOP® are studied to confirm the possibility of the 2.3D structure organic packages from the perspective of signal and power integrity. Firstly, the signal integrity between two devices is simulated, comparing the differences between i-THOP® and the 2.5D silicon interposer. Secondly, the signal integrity in die-to-substrate vertical interconnection is simulated, comparing between 2.1D, 2.3D i-THOP® and the 2.5D silicon interposer. Finally, as for the power delivery point of view, power distribution network (PDN) impedance is compared between 2.1D and 2.3D i-THOP®.

scholarly journals Power Integrity Analysis of Power Distribution Network Segmented Using DGS–Electromagnetic Bandgap Structure in Mixed-Signal PCBs

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2036
Author(s):  
Myunghoi Kim
Keyword(s):  
Power Distribution ◽  
Domain Decomposition Method ◽  
Distribution Network ◽  
Power Integrity ◽  
Electromagnetic Bandgap ◽  
Power Distribution Network ◽  
Wave Simulation ◽  
Full Wave ◽  
Resonant Modes ◽  
Integrity Analysis

In this paper, we present the power integrity analysis of a power distribution network (PDN) employing a segmentation technique based on the electromagnetic bandgap (EBG) structure with a defected ground structure (DGS). For efficient analysis of power integrity, a domain decomposition method (DDM) with a novel modeling of the DGS–EBG-based PDN is presented. In the DDM, analytical models for the partitioned parts of the PDN are developed, and their impedance parameters are analytically extracted. The resonant modes for the power integrity analysis are rigorously examined using the DDM and electric-field distribution. The effect of the DGS–EBG stopband on the resonant modes are analyzed. The proposed DDM and power integrity analysis are verified using full-wave simulation and measurements. The DDM result shows good agreement with the full-wave simulation and measurements.

Comparison Between Multilayer Ceramic and Organic Package Substrates Based Upon Signal and Power Integrity

2011 ◽  
Vol 2011 (1) ◽  
pp. 000905-000913
Author(s):  
Jerry Aguirre ◽  
Paul Garland ◽  
Marcos Vargas ◽  
Heather Tallo ◽  
Joseph Tallo
Keyword(s):  
Power Distribution ◽  
Flip Chip ◽  
Organic Substrate ◽  
Electrical Performance ◽  
Power Integrity ◽  
Power Distribution Network ◽  
Wave Simulation ◽  
Full Wave ◽  
Differential Pair ◽  
Multilayer Ceramic

Comparisons between organic and ceramic packaging is a difficult task given the considerable number of differences in material properties and potential tradeoffs between cost, electrical performance, thermal performance, and environmental factors. This paper presents a power and signal integrity comparison between a select set of multilayer organic technologies (HDBU and CPCore) and multilayer ceramic technologies (HTCC and LTCC). The geometry and material property impact on electrical performance for the flip-chip first level interconnect are qualitatively discussed and compared. The broadband frequency performance for the ball grid array (BGA) second-level interconnect to a PWB is simulated and characterized to 40 GHz for a differential pair using full-wave simulation. The impedance of the power distribution network (PDN) for a ceramic package is characterized by measurement to correlate with full-wave simulation to then subsequently compare with an organic substrate PDN.

Power and Thermal Constraints-Driven Modeling and Optimization for Through Silicon Via-Based Power Distribution Network

2018 ◽  
Vol 140 (4) ◽  
Author(s):  
Weijun Zhu ◽  
Gang Dong ◽  
Yintang Yang
Keyword(s):  
Power Distribution ◽  
Rational Design ◽  
Voltage Drop ◽  
Three Dimensional ◽  
Power Delivery ◽  
Power Distribution Network ◽  
Through Silicon Via ◽  
Power Delivery Network ◽  
Thermal Constraints ◽  
Global Power

The design of three-dimensional (3D) power delivery network (PDN) is constrained by both power and thermal integrity. Through-silicon via (TSV) as an important part of transmission power and heat in stack, the rational design of TSV layout is particularly important. Using minimal TSV area to achieve the required 3D PDN is significant to reduce manufacturing costs and increase integration. In this paper, we propose electrical and thermal models of 3D PDN, respectively, and we use them to solve the 3D voltage drop and temperature distribution problems. The accuracy and efficiency of our proposed methods are demonstrated by simulation measurement. Combining these two methods, a layer-based optimization solution is developed and allows us to adjust the TSV density for different layers while satisfying the global power and thermal constraints. This optimization is scalable and has the same guiding value for multichip stacks with different functions and constraints. A setup of four-chip stack is used to demonstrate the feasibility of this optimization and a large TSV area saving is achieved by this method.

Signal and Power Integrity Co-Simulation on DDR Memory

2011 ◽  
Author(s):  
Md. Ruhul Quddus ◽  
Sanjiv Soman
Keyword(s):  
Traditional Method ◽  
Signal Integrity ◽  
Power Delivery ◽  
Signal Quality ◽  
Power Integrity ◽  
Random Data ◽  
Eye Diagram ◽  
Burst Data ◽  
Definition Of ◽  
Integrity Analysis

Even though it has always been known that Signal Integrity analysis and Power Integrity (Power Delivery) analysis are related, historically they have been treated and analyzed independently with some timing and voltage buckets used to tie the effects of one on the other. When the voltage and timing margins were large, this approach worked quite well. However as voltage levels, timing windows and their margins have shrunk, the traditional method of analyzing them independently no longer suffices. The signal quality and timing (eye height & eye width) losses due to the effects of power delivery are no longer negligible. The concept of signal integrity & power delivery co-simulation (referred to as SIPD or SIPI co-sim) is a methodology developed to address this problem. In this paper we will use the DDR bus as an example to illustrate the impacts of power delivery on the signal and highlight how badly the margin loss would have been underestimated if the effects of power delivery were ignored. The paper will demonstrate how SIPD co-sim can quantify or illustrate - the effects of data randomization, margin gain with fully random data patterns, margin loss due to the effects of Burst-Idle-Burst data patterns, definition of noise & eye diagram BER, statistically significant noise in system, etc.

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