Design and Research of Highly Integrated Multi-channel Tile-type T/R Module

This paper introduces a design scheme and key technology of a multi-channel tile-type T/R module. In order to meet the requirements of high reliability, miniaturization, lightweight and multi-functional integration, a vertical interconnection design method of high integrated multi-channel tile-type T / R module is proposed. LTCC technology is used to achieve high-density stacking of radio frequency devices, while bare chips are used to improve system integration and reliability. The module integrates 4 isolated transceiver channels with a size of 40mm×40mm×10mm, which significantly reduces the volume and weight compared to the traditional T/R module structure. The module simulation results prove that the design scheme is easy to implement and fault location maintenance, and the test results meet the design indicators.

An Ultra-Wideband Compact TR Module Based on 3-D Packaging

This study presents a novel four-channel tile-type T/R module which achieves excellent performances in ultra-wideband (2–12 GHz) and integrates all circuits in a super-light (25 g) and compact (27.8 × 27.8 × 12 mm3) mechanical structure in active phased array systems. The key advancement of this T/R module was to choose a Ball Grid Array (BGA) as the vertical interconnection and bracing between High-Temperature Co-fired Ceramic (HTCC) substrates in order to achieve a high-integration 3-D structure. Exploiting the HTCC multilayer layout, this paper presents the design and development of an ultra-wideband, compact and light, high-output power, four-channel, dual-polarization Transmit/Receive (T/R) Module. In this module, microwave circuits and power control circuits are highly integrated into electrically isolated HTCC layers or substrates, resulting in low coupling and crosstalk between signals. Furthermore, multichip assembly technology, multifunctional MMICs, and other high-integration technologies were adopted for this module. Each channel could provide more than 2 W transmit output power, more than 15 dB receive gain, and less than 5 dB receive noise figure. Every module contains four channels. The power supply and phase/amplitude conditioning of each channel can be controlled individually and showed good consistency of the amplitude and phase of all channels. The connectors of manifold port and polarization ports are all SSMP, which can achieve further integration. This module has also an automatic negative power protection function. The module has stabilized performance and mass production prospects.

A Novel Fabrication Method for a Capacitive MEMS Accelerometer Based on Glass–Silicon Composite Wafers

In this paper, we report a novel teeter-totter type accelerometer based on glass-silicon composite wafers. Unlike the ordinary micro-electro-mechanical systems (MEMS) accelerometers, the entire structure of the accelerometer, includes the mass, the springs, and the composite wafer. The composite wafer is expected to serve as the electrical feedthrough and the fixed capacitance plate at the same time, to simplify the fabrication process, and to save on chip area. It is manufactured by filling melted borosilicate glass into an etched silicon wafer and polishing the wafer flat. A sensitivity of 51.622 mV/g in the range of ±5 g (g = 9.8 m/s2), a zero-bias stability under 0.2 mg, and the noise floor with 11.28 µg/√Hz were obtained, which meet the needs of most acceleration detecting applications. The micromachining solution is beneficial for vertical interconnection and miniaturization of MEMS devices.

Vertical Integration in Content Provisioning With Cloud Migration

The continuous growth of internet traffic is significantly pushed by emerging high bandwidth demanding contents. All participants in the content provisioning process including content providers, service providers, Content Delivery Networks (CDN) and customers are influenced by bandwidth requirements. Appropriate bandwidth demand estimation is of great importance for addressing resource investment. Providers in content provisioning process need to consider cloud migration in order to minimize costs. The vertical interconnection between involved providers is necessary. Larger undertakings often perform vertical integration, thus ensuring a higher control over different segments of the process. The vertically integrated content provider's incentives for cloud migration can induce significant changes in interconnection contracts in the content provisioning process. In this chapter different methods of vertical interconnection charging among vertically integrated providers are analyzed and compared.

Research of Wafer Level Bonding Process Based on Cu–Sn Eutectic

In 3D-system packaging technologies, eutectic bonding is the key technology of multilayer chip stacking and vertical interconnection. Optimized from the aspects of the thickness of the electroplated metal layer, the pretreatment of the wafer surface removes the oxide layer, the mutual alignment between the wafers, the temperature of the wafer bonding, the uniformity of pressure and the deviation of the bonding process. Under the pretreatment conditions of plasma treatment and citric acid cleaning, no oxide layer was obtained on the metal surface. Cu/Sn bumps bonded under the condition of 0.135 Mpa, temperature of 280 °C, Sn thickness of 3–4 μm and a Cu-thickness of five micrometers. Bonded push crystal strength ≥18 kg/cm2, the average contact resistance of the bonding interface is about 3.35 mΩ, and the bonding yield is 100%. All performance indicators meet and exceed the industry standards.