USING BOUNDARY SCAN IN DIGITAL SYSTEMS

International Journal of Computing ◽

10.47839/ijc.3.2.294 ◽

2014 ◽

pp. 113-118

Author(s):

Marina Kaminskaya

Keyword(s):

Control Method ◽

Digital Systems ◽

Boundary Scan ◽

Ieee 1149.1

Proposed fault control method in digital systems. He was developed with deductive simulation. Was proposed to use standard IEEE 1149.1 Boundary scan for control additional virtual outputs.

A user programmable macrocell generator for the IEEE 1149.1 boundary scan standard interface port

Microprocessing and Microprogramming ◽

10.1016/0165-6074(92)90359-f ◽

1992 ◽

Vol 35 (1-5) ◽

pp. 493-500

Author(s):

Mark Royals ◽

Tassos Markas ◽

Nick Kanopoulos

Keyword(s):

Boundary Scan ◽

Standard Interface ◽

Ieee 1149.1

A chip to embedded system test process using IEEE 1149.1 boundary scan

Proceedings of ELECTRO '94 ◽

10.1109/electr.1994.472652 ◽

2002 ◽

Author(s):

J.E. Kadaras

Keyword(s):

Embedded System ◽

Boundary Scan ◽

Ieee 1149.1 ◽

Test Process

Manufacturing defects testing of a multi-chip-module using IEEE 1149.1 boundary scan test and embedded built-in test software

AUTOTESTCON 93 ◽

10.1109/autest.1993.396355 ◽

2002 ◽

Author(s):

B.J. Round

Keyword(s):

Boundary Scan ◽

Manufacturing Defects ◽

Scan Test ◽

Ieee 1149.1 ◽

Boundary Scan Test

Optimal placement of IEEE 1149.1 test port and boundary scan resources for wafer scale integration

Proceedings. International Test Conference 1990 ◽

10.1109/test.1990.114009 ◽

2002 ◽

Cited By ~ 3

Author(s):

D.L. Landis ◽

P. Singh

Keyword(s):

Optimal Placement ◽

Boundary Scan ◽

Wafer Scale ◽

Wafer Scale Integration ◽

Ieee 1149.1 ◽

Scale Integration

A new IEEE 1149.1 boundary scan design for the detection of delay defects

Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537) ◽

10.1109/date.2000.840311 ◽

2002 ◽

Cited By ~ 2

Author(s):

Sungju Park ◽

Taehyung Kim

Keyword(s):

Boundary Scan ◽

Scan Design ◽

Ieee 1149.1 ◽

Delay Defects

A new IEEE 1149.1 boundary scan design for the detection of delay defects

Proceedings of the conference on Design, automation and test in Europe - DATE '00 ◽

10.1145/343647.343822 ◽

2000 ◽

Cited By ~ 11

Author(s):

Sungju Park ◽

Taehyung Kim

Keyword(s):

Boundary Scan ◽

Scan Design ◽

Ieee 1149.1 ◽

Delay Defects

Low cost boundary scan controller for didactic applications (IEEE 1149.1)

2015 3rd Experiment International Conference (exp.at'15) ◽

10.1109/expat.2015.7463266 ◽

2015 ◽

Author(s):

Andre Fidalgo ◽

Andre Couto ◽

Manuel Felgueiras ◽

Gustavo Alves

Keyword(s):

Low Cost ◽

Boundary Scan ◽

Ieee 1149.1

IS IEEE 1149.1 BOUNDARY SCAN COST EFFECTIVE: A SIMPLE CASE STUDY

Proceedings International Test Conference 1992 ◽

10.1109/test.1992.527810 ◽

2005 ◽

Cited By ~ 6

Author(s):

B. Caldwell ◽

T. Langford

Keyword(s):

Cost Effective ◽

Boundary Scan ◽

Ieee 1149.1

Designing IEEE 1149.1 compatible boundary-scan logic into an ASIC using Texas Instrument's Scope architecture

10.1109/asic.1990.186154 ◽

2002 ◽

Author(s):

J. Koeter

Keyword(s):

Boundary Scan ◽

Ieee 1149.1

Safety of single-channel control systems implemented in reversible logic

AUTOBUSY – Technika Eksploatacja Systemy Transportowe ◽

10.24136/atest.2018.462 ◽

2018 ◽

Vol 19 (12) ◽

pp. 608-610

Author(s):

Roman Pniewski ◽

Michał Dobrzański

Keyword(s):

Control Systems ◽

Single Channel ◽

Control Method ◽

Fault Tolerant ◽

Dynamic Change ◽

Reversible Logic ◽

Digital Systems ◽

Correct Operation ◽

Control Signals ◽

Channel Control

The article discusses the method of controlling the correct operation of a control system using reversible gates developed by the authors. Reversible logic allows you to build fault-tolerant digital systems. The authors proposed an improved control method with a dynamic change of control signals, which can significantly improve safety.