Metadata For Root Cause Analysis

2021 ◽  
Author(s):  
Alexander A. Grusho ◽  
Nick A. Grusho ◽  
Michael I. Zabezhailo ◽  
Elena E. Timonina ◽  
Vladimir V. Senchilo
Keyword(s):  
Approximate Solution ◽  
Computing System ◽  
Information Resource ◽  
Work Processes ◽  
Auxiliary Data ◽  
Cause Analysis ◽  
Technical Device ◽  
Distributed Information ◽  
Approximate Approach ◽  
Root Cause

The paper is devoted to the task of finding the root cause of anomaly in a distributed information and computing system. An approximate approach is considered to detect implicit anomalies with accuracy to the object (of a component of the technical device, a node of a network infrastructure, an application or of an information resource). The approximate solution is based on the use of integral parameters that allow you to identify an anomaly, but do not allow you to indicate its cause. To work with such methods for determining the root causes of anomalies, auxiliary data is required, which is called metadata in the work. The work describes a metadata construction algorithm and shows ways of using metadata to build an object in which the root cause of the anomaly is located. An approximate solution to the problem of finding the root cause of an anomaly with a help of quickly computable values of integral parameters is necessary to reduce the time of interruption of work processes due to implicit anomalies. It is assumed that small subsystems and nodes are easier to replace than to delve into the study of the cause.

Root Cause analysis of SG tube ODSCC indications within the tube sheets of NPP biblis unit A

2011 ◽  
pp. 78-86
Author(s):  
R. Kilian ◽  
J. Beck ◽  
H. Lang ◽  
V. Schneider ◽  
T. Schönherr ◽  
...  
Keyword(s):  
Root Cause Analysis ◽  
Cause Analysis ◽  
Root Cause

Rule Construction and its Execution for Root Cause Analysis

2012 ◽  
Vol 132 (10) ◽  
pp. 1689-1697
Author(s):  
Yutaka Kudo ◽  
Tomohiro Morimura ◽  
Kiminori Sugauchi ◽  
Tetsuya Masuishi ◽  
Norihisa Komoda
Keyword(s):  
Root Cause Analysis ◽  
Cause Analysis ◽  
Root Cause

Root Cause Analysis Techniques Using Picosecond Time Resolved LADA

2014 ◽  
Author(s):  
Dan Bodoh ◽  
Kent Erington ◽  
Kris Dickson ◽  
George Lange ◽  
Carey Wu ◽  
...  
Keyword(s):  
Integrated Circuits ◽  
Picosecond Laser ◽  
Root Cause Analysis ◽  
Fault Isolation ◽  
Time Resolved ◽  
Cause Analysis ◽  
Root Cause ◽  
Design And Manufacturing ◽  
Multiple Interactions ◽  
Established Technique

Abstract Laser-assisted device alteration (LADA) is an established technique used to identify critical speed paths in integrated circuits. LADA can reveal the physical location of a speed path, but not the timing of the speed path. This paper describes the root cause analysis benefits of 1064nm time resolved LADA (TR-LADA) with a picosecond laser. It shows several examples of how picosecond TR-LADA has complemented the existing fault isolation toolset and has allowed for quicker resolution of design and manufacturing issues. The paper explains how TR-LADA increases the LADA localization resolution by eliminating the well interaction, provides the timing of the event detected by LADA, indicates the propagation direction of the critical signals detected by LADA, allows the analyst to infer the logic values of the critical signals, and separates multiple interactions occurring at the same site for better understanding of the critical signals.

Analysis of Induced End-of-Life Failures in SRAM Through Nanoprobing

2018 ◽  
Author(s):  
Oberon Dixon-Luinenburg ◽  
Jordan Fine
Keyword(s):  
End Of Life ◽  
Soft Errors ◽  
Cause Analysis ◽  
New Approach ◽  
Performance Loss ◽  
Root Cause ◽  
Long Period ◽  
Atomic Force ◽  
Stress Resultant ◽  
Voltage Stress

Abstract In this paper, we demonstrate a novel nanoprobing approach to establish cause-and-effect relationships between voltage stress and end-of-life performance loss and failure in SRAM cells. A Hyperion II Atomic Force nanoProber was used to examine degradation for five 6T cells on an Intel 14 nm processor. Ten minutes of asymmetrically applied stress at VDD=2 V was used to simulate a ‘0’ bit state held for a long period, subjecting each pullup and pulldown to either VDS or VGS stress. Resultant degradation caused read and hold margins to be reduced by 20% and 5% respectively for the ‘1’ state and 5% and 2% respectively for the ‘0’ state. ION was also reduced, for pulldown and pullup respectively, by 4.5% and 5.4% following VGS stress and 2.6% and 33.8% following VDS stress. Negative read margin failures, soft errors, and read time failures all become more prevalent with these aging symptoms whereas write stability is improved. This new approach enables highly specific root cause analysis and failure prediction for end-of-life in functional on-product SRAM.

Root Cause Analysis for Pin Leakage

2016 ◽  
Author(s):  
Zhigang Song ◽  
Jochonia Nxumalo ◽  
Manuel Villalobos ◽  
Sweta Pendyala
Keyword(s):  
Failure Analysis ◽  
Root Cause Analysis ◽  
Advanced Technology ◽  
Process Step ◽  
Cause Analysis ◽  
Hard Mask ◽  
Technology Node ◽  
Root Cause ◽  
Tools And Techniques

Abstract Pin leakage continues to be on the list of top yield detractors for microelectronics devices. It is simply manifested as elevated current with one pin or several pins during pin continuity test. Although many techniques are capable to globally localize the fault of pin leakage, root cause analysis and identification for it are still very challenging with today’s advanced failure analysis tools and techniques. It is because pin leakage can be caused by any type of defect, at any layer in the device and at any process step. This paper presents a case study to demonstrate how to combine multiple techniques to accurately identify the root cause of a pin leakage issue for a device manufactured using advanced technology node. The root cause was identified as under-etch issue during P+ implantation hard mask opening for ESD protection diode, causing P+ implantation missing, which was responsible for the nearly ohmic type pin leakage.

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