Low-Voltage Operation of Organic Thin Film Transistors by using Dual Gate Dielectrics

2007 ◽  
Author(s):  
Sang-Bok Kong ◽  
Chung-Kun Song
2008 ◽  
Vol 47 (8) ◽  
pp. 6496-6501 ◽  
Author(s):  
Kang Dae Kim ◽  
Dong Soo Kim ◽  
Chung Kyun Kim ◽  
Chung Kun Song

MRS Advances ◽  
2018 ◽  
Vol 3 (49) ◽  
pp. 2931-2936
Author(s):  
G. Kitahara ◽  
K. Aoshima ◽  
J. Tsutsumi ◽  
H. Minemawari ◽  
S. Arai ◽  
...  

ABSTRACTRecently, an epoch-making printing technology called “SuPR-NaP (Surface Photo-Reactive Nanometal Printing)” that allows easy, high-speed, and large-area manufacturing of ultrafine silver wiring patterns has been developed. Here we demonstrate low-voltage operation of organic thin-film transistors (OTFTs) composed of printed source/drain electrodes that are produced by the SuPR-NaP technique. We utilize an ultrathin layer of perfluoropolymer, Cytop, that functions not only as a base layer for producing patterned reactive surface in the SuPR-NaP technique but also as an ultrathin gate dielectric layer of OTFTs. By the use of 22 nm-thick Cytop gate dielectric layer, we successfully operate polycrystalline pentacene OTFTs below 2 V with negligible hysteresis. We also observe the improvement of carrier injection by the surface modification of printed silver electrodes. We discuss that the SuPR-NaP technique allows the production of high-capacitance gate dielectric layers as well as high-resolution printed silver electrodes, which provides promising bases for producing practical active-matrix OTFT backplanes.


2017 ◽  
Vol 50 ◽  
pp. 426-428 ◽  
Author(s):  
Gyo Kitahara ◽  
Keisuke Aoshima ◽  
Jun'ya Tsutsumi ◽  
Hiromi Minemawari ◽  
Shunto Arai ◽  
...  

2018 ◽  
Vol 8 (8) ◽  
pp. 1341 ◽  
Author(s):  
Rei Shiwaku ◽  
Masataka Tamura ◽  
Hiroyuki Matsui ◽  
Yasunori Takeda ◽  
Tomohide Murase ◽  
...  

Dual-gate organic thin-film transistors (DGOTFTs), which exhibit better electrical properties, in terms of on-current and subthreshold slope than those of single-gate organic thin-film transistors (OTFTs) are promising devices for high-performance and robust organic electronics. Electrical behaviors of high-voltage (>10 V) DGOTFTs have been studied: however, the performance analysis in low-voltage DGOTFTs has not been reported because fabrication of low-voltage DGOTFTs is generally challenging. In this study, we successfully fabricated low-voltage (<5 V) DGOTFTs by employing thin parylene film as gate dielectrics and visualized the charge carrier distributions in low-voltage DGOTFTs by a simulation that is based on finite element method (FEM). The simulation results indicated that the dual-gate system produces a dual-channel and has excellent control of charge carrier density in the organic semiconducting layer, which leads to the better switching characteristics than the single-gate devices.


2013 ◽  
Vol 25 (23) ◽  
pp. 4806-4812 ◽  
Author(s):  
Chao Wang ◽  
Wen-Ya Lee ◽  
Reina Nakajima ◽  
Jianguo Mei ◽  
Do Hwan Kim ◽  
...  

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