DC-Link Current Harmonic Mitigation via Phase-Shifting of Carrier Waves in Paralleled Inverter Systems

DC-connected parallel inverter systems are gaining popularity in industrial applications. However, such parallel systems generate excess current ripple (harmonics) at the DC-link due to harmonic interactions between the inverters in addition to the harmonics from the PWM switching. These DC-link harmonics cause the failure of fragile components such as DC-link capacitors. This paper proposes an interleaving scheme to minimize the current harmonics induced in the DC-link of such a system. First, the optimal phase-shift angle for the carrier signal is investigated using the analytical equations, which provides maximum capacitor current ripple cancellation (i.e., at the main switching frequency harmonic component). These optimally phase-shifted switching cycles lead to variations of the output current ripples, which, when summed together at the DC-link, result in the cancellations of the DC-link current ripples. The results show that when the carrier waves of the two inverters are phase-shifted by a 90° angle, the maximum high-frequency harmonic ripple cancellation occurs, which reduces the overall root-mean-square (RMS) value of the DC-capacitor current by almost 50%. The outcome of this proposed solution is a cost-effective DC-harmonics mitigating strategy for the industrial designers to practically configure multi-inverter systems, even when most of the drives are not operating at rated power levels. The experimental and simulation results presented in this paper verify the effectiveness of the proposed carrier-based phase-shifting scheme for two different configurations of common DC connected multi-converter systems.

DC-link Current Harmonic Mitigation via Phase-shifting of Carrier Waves in Paralleled Inverter Systems

DC-connected parallel inverter systems are gaining popularity in industrial applications. However, such parallel systems generate excess current ripple (harmonics) at the DC-link due to harmonic interactions between the inverters in addition to the harmonics from the PWM switching. These DC-link harmonics cause the failure of fragile components such as DC-link capacitors. This paper proposes an interleaving scheme to minimize the current harmonics induced in the DC-link of such a system. The results show that when the carrier waves of the two inverters are phase-shifted by 90° angle, the maximum high-frequency harmonic ripple cancellation occurs, which reduces the overall RMS value of the DC-capacitor current.The outcome of this proposed solution is a cost-effective DC-harmonics mitigating strategy for the industrial designers to practically configuring multi-inverter systems, even when most of the drives are not operating at rated power levels. Experimental and simulation results presented in this paper verify the effectiveness of the proposed carrier-based phase-shifting scheme for two different configurations of common DC connected multi-converter systems.

MOS capacitor based Dickson charge pump and ripple cancellation techniques using an LC circuit

This paper proposes a new architecture using integrated inductor and MOS capacitor based on Dickson charge pump associated with two parallel LC circuit after the first stage and output stage which cancel the ripple voltage that is generated in the output stage. In this circuit, the MOS capacitor as used instead of pumping capacitor, which helps in reducing the circuit Silicon area. Efficiency up to 80–90% can be achieved by reducing the parasitic effects and by using a MOS capacitor. The efficiency conversion and voltage gain increase or decreases depending on inductor and capacitor values. Vt drop loss is managed using high voltage clock. It shows that 3.5 V output voltage is generated from input voltage of 1.0 V with five stages of MOS capacitor (used as Pumping capacitor) in working frequency of 100 MHz the simulations were performed in Cadence Virtuoso platform with 0.18 μm CMOS process.