A novel connected structure of all-optical high speed and ultra-compact photonic crystal OR logic gate

A new connected structure of an all-optical “OR” logic gate realized with photonic crystals is proposed in this study. The structure is based on coupling the input guides with two microcavities; the unit cell of the structure is designed to achieve a band gap around the communication wavelength (i.e., 1.55 µm). The performance of the structure results in transmission efficiency and low losses. This compact size logic gate is considered an important element in the integration of a nanoscale photonic device.

A Multifunctional Molecular Probe for Detecting Hg2+ and Ag+ Based on Ion-Mediated Base Mismatch

In this paper, a multifunctional biosensing platform for sensitively detecting Hg2+ and Ag+, based on ion-mediated base mismatch, fluorescent labeling, and strand displacement, is introduced. The sensor can also be used as an OR logic gate, the multifunctional design of sensors is realized. Firstly, orthogonal experiments with three factors and three levels were carried out on the designed sensor, and preliminary optimization of conditions was performed for subsequent experiments. Next, the designed sensor was tested the specificity and target selectivity under the optimized conditions, and the application to actual environmental samples further verified the feasibility. Generally, this is a convenient, fast, stable, and low-cost method that provides a variety of ideas and an experimental basis for subsequent research.

A Novel One SWS-FET Transistor for AND/OR Logic Gate

This paper presents the design and modeling of AND/OR logic gate using one high-mobility n-channel spatial wave-function switched field-effect transistor (n-SWS-FET), which provide a significant reduction of cell area and power dissipation. In SWSFET, the channel between source and drain has two or more quantum well (QW) layers separated by a high band gap material between them. The gate voltage controls the charge carrier concentration in the two quantum well layers and it causes the switching of charge carriers from one channel to other channel of the SWS device. This switching property promises to build AND/OR logic gate with one n-SWS-FET transistor, where Complementary Metal Oxide Semiconductor (CMOS) AND/OR gate is built by 6 transistors. The proposed gate configures as AND/OR by change sources signal. The SWS-FET device with two well Si/Si0.5Ge0.5 has been modeled using Berkeley Short-channel IGFET Model (BSIM4.6.0) and Analog Behavioral Model (ABM), the model is suitable for transient analysis at circuit level. This model is optimized for AND/OR logic and used to replace a conventional CMOS logic.