Design of RLC Circuit Parameter and Fault Location Test Device

In order to improve the quality and performance of electronic equipment, circuit parameters and fault detection technology are also very important. The impedance value, which differs obviously under different input signals in the analog circuit, is also an important parameter. Through the analysis of this parameter, RLC circuit parameters and fault location detection can be realized. In this paper, STM32 is used as the main controller to control the signal source to generate sinusoidal signal. The signal processing is completed by designing the amplifier module, and the signal acquisition is completed by the digital to analog conversion module. In the controller, the impedance analysis, the measurement of component parameters, the detection of load network structure and the measurement of short-circuit point position are completed. Finally, the designed system was used to test different structural loads, and the detection results of component parameters, load network structure and short-circuit point position are accurate and reliable.

A Comparative Performance Analysis of Zero Voltage Switching Class E and Selected Enhanced Class E Inverters

This paper presents a comparative analysis of the class E and selected enhanced class E inverters, namely, the second and third harmonic group of class EFn, E/Fn and the class E Flat Top inverter. The inverters are designed under identical specifications and evaluated against the variation of switching frequency (f), duty ratio (D), capacitance ratio (k), and the load resistance (RL). To offer a comparative understanding, the performance parameters, namely, the power output capability, efficiency, peak switch voltage and current, peak resonant capacitor voltages, and the peak current in the lumped network, are determined quantitatively. It is found that the class EF2 and E/F3 inverters, in general, have higher efficiency and comparable power output capability with respect to the class E inverter. More specifically, the class EF2 (parallel LC and in series to the load network) and E/F3 (parallel LC and in series to the load network) maintain 90% efficiency compared to 80% for class E inverter at the optimum operating condition. Furthermore, the peak switch voltage and current in these inverters are on average 20–30% lower than the class E and other versions for k > 1. The analysis also shows that the class EF2 and E/F3 inverters should be operated in the stretch of 1 < k < 5 and D = 0.3–0.6 at the optimum load to sustain the high-performance standard.

Key node identification of wireless sensor networks based on cascade failure

Wireless sensor networks (WSNs) have become one of the core technologies of the internet of things (IoT) system. They are information generation and acquisition systems used by the IoT to sense and identify the surrounding environment. They are also sensor technology, embedding computing technology, communication technology and important product in the development of Internet technology, which have made the whole society more intelligent and humanized. WSNs are multi-hop self-organizing networks consisting of a large number of micro-sensor nodes deployed in the monitoring area. They can collaboratively sense, collect and process the monitored objects and transmit them to the observers. In this paper, we use the cascade failure method to find the key nodes in the WSNs. First, a complex network cascade failure model based on load redistribution is proposed. Differences from the existing model are as follows: (1) for each node, an overload function is defined; (2) the evolution of the network topology is replaced by node weight evolution. Based on the cascade failure model, a method for evaluating the importance of complex load network nodes is proposed and a new definition of node importance is given. This method helps to discover some potential “critical nodes” in the network. The final experimental analysis verifies the effectiveness and feasibility of the proposed method.

Design of Broadband 1.9 GHz Ga as MMIC Switching Power Amplifier for PCS Communication Services

The paper presents a broadband Monolithic microwave Switching Class–E Power amplifier using 0.5μm GaAs E-pHEMT technology for PCS communications systems operating at 1900MHz.Wider bandwidth is achieved by employing reactance compensation technique in load network of the switching power amplifier. The main Power amplifier is a single stage Class-E circuit with a driver stage driving it to achieve high gain and efficiency. The modified load network using reactance compensation network results in higher power added efficiency. The paper provides simulation results of designed two-stage Class-E Power amplifier circuit results with an power output of 20dBm, power added efficiency of 80% and gain of 26dB at the centre frequency of 1.9GHz compared with various Class-E designs of 1.9 GHz using different technologies. A high linear gain is reported in the design at the frequency range of 0.8GHz to 2.2GHz.The designed circuit achieves a wider bandwidth of 1.35GHz over a frequency range of 0.8-2.2GHz.The physical layout is drawn using GaAs foundry components and EM simulation is performed