Disclinations and disconnections in minerals and metals

A different type of defect, the coherency disclination, is added to disclination types. Disconnections that include disclination content are considered. A criterion is suggested to distinguish disconnections with dislocation content from those with disclination content. Electron microscopy reveals unit disconnections in a low albite grain boundary, defects important in grain boundary sliding. Disconnections of varying step heights are displayed and shown to define both deformed and recovered structures.

Performance and Reliability Impacts of Extended Epitaxial Defects on 4H-SiC Power Devices

This work explores the effects of extended epitaxial defects on 4H-SiC power devices. Advanced defect mapping techniques were used on large quantities of power device wafers, and data was aggregated to correlate device electrical characteristics to defect content. 1200 V class Junction Barrier Schottky (JBS) diodes and MOSFETs were examined in this manner; higher voltage 3.3 kV class devices were examined as well. 3C inclusions and triangular defects, as well as heavily decorated substrate scratches, were found to be device killing defects. Other defects were found to have negligible impacts on device yield, even in the case of extremely high threading dislocation content. Defect impacts on device reliability was explored on MOS-gate structures, as well as long-term device blocking tests on both MOSFETs and JBS diodes. Devices that passed on-wafer electrical parametric tests were found to operate reliably in these tests, regardless of defect content.

Characterisation of Dislocation-Content in Multicrystalline-Silicon Wafers

A major performance limiting factor of multicrystalline silicon wafers is structural defects, mainly dislocations, reducing solar cell efficiency. Dislocations are formed during crystallisation process. Characterization of dislocation-content is necessary both to optimise the crystallisation and to eliminate bad wafers before cell processing. We developed two techniques to characterise dislocations: conventional etch-pit counting modified for full size wafers using a new etch-recipe and a novel etch-pit counting algorithm. Secondly we developed a technique to estimate the dislocation content directly from photoluminescence images of as-cut wafers.