2006 IEEE International Conference on IC Design and Technology
Latest Publications

TOTAL DOCUMENTS

124

(FIVE YEARS 0)

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(FIVE YEARS 0)

Published By IEEE

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Inductance Modeling for On-chip interconnects using Elevated coplanar waveguide

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669412 ◽

2006 ◽

Author(s):

R. Ranjithkumar ◽

S. Rajaram ◽

S. Raju ◽

V. Abhaikumar

Keyword(s):

Coplanar Waveguide ◽

On Chip

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Robust 45nm porous low-k process integration with well-controlled plasma process damage and moisture uptake

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669391 ◽

2006 ◽

Author(s):

N. Matsunaga

Keyword(s):

Process Integration ◽

Moisture Uptake ◽

Plasma Process ◽

Process Damage ◽

Low K

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Modified Force-Directed Scheduling for Peak and Average Power Optimization using Multiple Supply-Voltages

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669410 ◽

2006 ◽

Cited By ~ 3

Author(s):

A.K. Allam ◽

J. Ramanujam

Keyword(s):

Power Optimization ◽

Average Power ◽

Supply Voltages ◽

Multiple Supply Voltages

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Totally Silicided (TOSI) Gates as an evolutionary metal gate solution for advanced CMOS technologies

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669403 ◽

2006 ◽

Author(s):

M. Muller ◽

A. Mondot ◽

D. Aime ◽

N. Gierczynski ◽

G. Ribes ◽

...

Keyword(s):

Metal Gate

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Multi-Gate MOSFETs with Back-Gate Control

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669384 ◽

2006 ◽

Author(s):

T. Hiramoto ◽

T. Nagumo

Keyword(s):

Back Gate ◽

Gate Control

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Silicon characterization of standby leakage reduction techniques in a 0.13μm Low Power Partially-Depleted Silicon-On-Insulator Technology

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669366 ◽

2006 ◽

Author(s):

N. L'Hostis ◽

O. Thomas ◽

S. Haendler ◽

A. Amara ◽

P. Flatresse ◽

...

Keyword(s):

Low Power ◽

Silicon On Insulator ◽

Leakage Reduction ◽

Reduction Techniques ◽

Silicon On Insulator Technology

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Carbon Nanotubes for Potential Device and Interconnect Applications

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669401 ◽

2006 ◽

Author(s):

W. Hoenlein

Keyword(s):

Carbon Nanotubes

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New modules, materials and architectures for Flash Memory scaling

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669423 ◽

2006 ◽

Author(s):

G. Molas ◽

B. de Salvo

Keyword(s):

Flash Memory ◽

Memory Scaling

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A Fast and Accurate Monte Carlo Method for Interconnect Variation

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669415 ◽

2006 ◽

Cited By ~ 2

Author(s):

M. Zhang ◽

M. Olbrich ◽

H. Kinzelbach ◽

D. Seider ◽

E. Barke

Keyword(s):

Monte Carlo ◽

Monte Carlo Method

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A Novel DCVS Tree Reduction Algorithm

2006 IEEE International Conference on IC Design and Technology ◽

10.1109/icicdt.2006.1669411 ◽

2006 ◽

Cited By ~ 2

Author(s):

O. Kavehie ◽

K. Navi ◽

T. Nikoubin ◽

M. Rouholamini

Keyword(s):

Reduction Algorithm

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2006 IEEE International Conference on IC Design and TechnologyLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Inductance Modeling for On-chip interconnects using Elevated coplanar waveguide

Robust 45nm porous low-k process integration with well-controlled plasma process damage and moisture uptake

Modified Force-Directed Scheduling for Peak and Average Power Optimization using Multiple Supply-Voltages

Totally Silicided (TOSI) Gates as an evolutionary metal gate solution for advanced CMOS technologies

Multi-Gate MOSFETs with Back-Gate Control

Silicon characterization of standby leakage reduction techniques in a 0.13μm Low Power Partially-Depleted Silicon-On-Insulator Technology

Carbon Nanotubes for Potential Device and Interconnect Applications

New modules, materials and architectures for Flash Memory scaling

A Fast and Accurate Monte Carlo Method for Interconnect Variation

A Novel DCVS Tree Reduction Algorithm

2006 IEEE International Conference on IC Design and Technology
Latest Publications