2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)

2018 ◽

Cited By ~ 1

Author(s):

Takahiro Iizuka ◽

Mitiko Miura-Mattausch ◽

Hiroyuki Hashigami ◽

Hans Jurgen Mattausch

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Efficient Two-Band based Non-Equilibrium Green's Function Scheme for Modeling Tunneling Nano-Devices

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551629 ◽

2018 ◽

Cited By ~ 2

Author(s):

Hamilton Carrillo-Nunez ◽

Jaehyun Lee ◽

Salim Berrada ◽

Cristina Medina-Bailon ◽

Mathieu Luisier ◽

...

Keyword(s):

Green’S Function ◽

Green's Function ◽

Non Equilibrium Green’S Function ◽

Non Equilibrium

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Effect of Electron-Electron Scattering on the Carrier Distribution in Semiconductor Devices

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551734 ◽

2018 ◽

Author(s):

Hans Kosina ◽

Markus Kampl

Keyword(s):

Electron Scattering ◽

Semiconductor Devices ◽

Carrier Distribution

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Intelligent DTCO (iDTCO) for next generation logic path-finding

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551723 ◽

2018 ◽

Cited By ~ 1

Author(s):

Uihui Kwon ◽

Takeshi Okagaki ◽

Young-seok Song ◽

Sungyeol Kim ◽

Yohan Kim ◽

...

Keyword(s):

Path Finding ◽

Next Generation

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A Compact Model of Drift and Diffusion Memristor Applied in Neuron Circuits Design

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551744 ◽

2018 ◽

Author(s):

Ying Zhao ◽

Cong Fang ◽

Qiang Li ◽

Nianduan Lu ◽

Feng Zhang ◽

...

Keyword(s):

Compact Model ◽

And Diffusion

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DTCO and TCAD for a 12 Layer-EUV Ultra-Scaled Surrounding Gate Transistor 6T-SRAM

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551632 ◽

2018 ◽

Author(s):

P. Matagne ◽

H. Nakamura ◽

M.-S. Kim ◽

Y. Kikuchi ◽

T. Huynh-Bao ◽

...

Keyword(s):

Surrounding Gate

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Design Guidelines and Limitations of Multilayer Two-dimensional Vertical Tunneling FETs for UltraLow Power Logic Applications

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551731 ◽

2018 ◽

Author(s):

Shang-Chun Lu ◽

Yuanchen Chu ◽

Youngseok Kim ◽

Mohamed Y. Mohamed ◽

Gerhard Klimeck ◽

...

Keyword(s):

Design Guidelines ◽

Two Dimensional ◽

Ultralow Power

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Modeling of Process (Ge, N) Dependence and Mechanical Strain Impact on NBTI in HKMG SiGe GF FDSOI p-MOSFETs and RMG p-FinFETs

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551724 ◽

2018 ◽

Cited By ~ 11

Author(s):

N. Parihar ◽

R. Tiwari ◽

C. Ndiaye ◽

M. Arabi ◽

S. Mhira ◽

...

Keyword(s):

Mechanical Strain

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Interplay of RDF and Gate LER Induced Statistical Variability in Negative Capacitance FETs

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551747 ◽

2018 ◽

Author(s):

Tapas Dutta ◽

Vihar Georgiev ◽

Asen Asenov

Keyword(s):

Negative Capacitance ◽

Statistical Variability

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Physical Insights on Junction Controllability for Improved Performance of Planar Trigate Tunnel FET as Capacitorless Dynamic Memory

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD) ◽

10.1109/sispad.2018.8551717 ◽

2018 ◽

Author(s):

Nupur Navlakha ◽

Abhinav Kranti

Keyword(s):

Dynamic Memory ◽

Tunnel Fet ◽

Improved Performance

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2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Consistent Modeling of Snapback Phenomenon Based on Conventional I-V Measurements

Efficient Two-Band based Non-Equilibrium Green's Function Scheme for Modeling Tunneling Nano-Devices

Effect of Electron-Electron Scattering on the Carrier Distribution in Semiconductor Devices

Intelligent DTCO (iDTCO) for next generation logic path-finding

A Compact Model of Drift and Diffusion Memristor Applied in Neuron Circuits Design

DTCO and TCAD for a 12 Layer-EUV Ultra-Scaled Surrounding Gate Transistor 6T-SRAM

Design Guidelines and Limitations of Multilayer Two-dimensional Vertical Tunneling FETs for UltraLow Power Logic Applications

Modeling of Process (Ge, N) Dependence and Mechanical Strain Impact on NBTI in HKMG SiGe GF FDSOI p-MOSFETs and RMG p-FinFETs

Interplay of RDF and Gate LER Induced Statistical Variability in Negative Capacitance FETs

Physical Insights on Junction Controllability for Improved Performance of Planar Trigate Tunnel FET as Capacitorless Dynamic Memory

Export Citation Format

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Consistent Modeling of Snapback Phenomenon Based on Conventional I-V Measurements

Efficient Two-Band based Non-Equilibrium Green's Function Scheme for Modeling Tunneling Nano-Devices

Effect of Electron-Electron Scattering on the Carrier Distribution in Semiconductor Devices

Intelligent DTCO (iDTCO) for next generation logic path-finding

A Compact Model of Drift and Diffusion Memristor Applied in Neuron Circuits Design

DTCO and TCAD for a 12 Layer-EUV Ultra-Scaled Surrounding Gate Transistor 6T-SRAM

Design Guidelines and Limitations of Multilayer Two-dimensional Vertical Tunneling FETs for UltraLow Power Logic Applications

Modeling of Process (Ge, N) Dependence and Mechanical Strain Impact on NBTI in HKMG SiGe GF FDSOI p-MOSFETs and RMG p-FinFETs

Interplay of RDF and Gate LER Induced Statistical Variability in Negative Capacitance FETs

Physical Insights on Junction Controllability for Improved Performance of Planar Trigate Tunnel FET as Capacitorless Dynamic Memory

2018 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD)
Latest Publications